L6229 STMicroelectronics, L6229 Datasheet - Page 16

• Manufacturer Part Number: L6229
• Description: DMOS DRIVER FOR THREE-PHASE BRUSHLESS DC MOTOR
• Manufacturer: STMicroelectronics

L6229
3.7 NON-DISSIPATIVE OVERCURRENT DETECTION and PROTECTION
The L6229 integrates an Overcurrent Detection Circuit (OCD) for full protection. This circuit provides Output-to-
Output and Output-to-Ground short circuit protection as well. With this internal over current detection, the exter-
nal current sense resistor normally used and its associated power dissipation are eliminated. Figure 20 shows
a simplified schematic for the overcurrent detection circuit.
To implement the over current detection, a sensing element that delivers a small but precise fraction of the out-
put current is implemented with each High Side power MOS. Since this current is a small fraction of the output
current there is very little additional power dissipation. This current is compared with an internal reference cur-
rent I
ator signals a fault condition. When a fault condition is detected, an internal open drain MOS with a pull down
capability of 4mA connected to pin DIAG is turned on.
The pin DIAG can be used to signal the fault condition to a µC or to shut down the Three-Phase Bridge simply
by connecting it to pin EN and adding an external R-C (see R
Figure 20. Overcurrent Protection Simplified Schematic
Figure 21 shows the Overcurrent Detetection operation. The Disable Time t
operation can be easily programmed by means of the accurate thresholds of the logic inputs. It is affected
whether by C
ing off the bridge when an overcurrent has been detected depends only by C
in Figure 23
C
should be chosen as big as possible according to the maximum tolerable Delay Time and the R
be chosen according to the desired Disable Time.
The resistor R
are respectively 100KΩ and 5.6nF that allow obtaining 200µs Disable Time.
16/25
EN
is also used for providing immunity to pin EN against fast transient noises. Therefore the value of C
REF
µC or LOGIC
V
DD
. When the output current reaches the detection threshold (typically I
R
C
EN
EN
EN
EN
and R
should be chosen in the range from 2.2KΩ to 180KΩ. Recommended values for R
DIAG
EN
EN
TO GATE
40Ω TYP.
values and its magnitude is reported in Figure 22. The Delay Time t
R
LOGIC
DS(ON)
POWER SENSE
OPEN-DRAIN
INTERNAL
1 cell
COMPARATOR
OCD
HIGH SIDE DMOS
POWER DMOS
OVER TEMPERATURE
n cells
I
1
OUT
I
1
/ n
1
I
I
I
REF
REF
1
+I
VS
2
+
/ n
A
OUT
I
2
EN
/ n
2
POWER DMOS
HIGH SIDE DMOS
I
2
, C
n cells
EN
).
D02IN1381
POWER SENSE
I
3
EN
1 cell
/ n
DISABLE
SOVER
value. Its magnitude is reported
OUT
= 2.8A) the OCD compar-
3
POWER DMOS
before recovering normal
I
3
VS
n cells
B
HIGH SIDE DMOS
DELAY
EN
POWER SENSE
value should
before turn-
EN
1 cell
and C
EN
EN