AT91SAM9M10 ATMEL Corporation, AT91SAM9M10 Datasheet - Page 17

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AT91SAM9M10

Manufacturer Part Number
AT91SAM9M10
Description
At91 Arm Thumb-based Microcontrollers
Manufacturer
ATMEL Corporation
Datasheet

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6.2.2
6.2.3
6355AS–ATARM–06-Jan-10
Matrix Slaves
Masters to Slaves Access
Each Slave has its own arbiter, thus allowing a different arbitration per Slave to be programmed.
Table 6-2.
All the Masters can normally access all the Slaves. However, some paths do not make sense,
such as allowing access from the Ethernet MAC to the internal peripherals. Thus, these paths
are forbidden or simply not wired, and shown as “-” in the following tables.
The four DDR ports are connected differently according to the application device.
The user can disable the Video Decoder in the Video Mode Configuration Register (bit
VDEC_SEL) in the Chip Configuration User Interface.
Slave 0
Slave 1
Slave 2
Slave 3
Slave 4
Slave 5
Slave 6
Slave 7
When the
respectively connected to DDR Port 0 and DDR Port 1. The other masters share DDR Port 2 and DDR
Port 3.
When the
controller, and DDR Port 1 to the LCD controller. The remaining masters share DDR Port 2 and DDR
Port 3.
Video Decoder is not enabled (VDEC_SEL=0)
Video Decoder is enabled (VDEC_SEL=1),
List of Bus Matrix Slaves
Internal SRAM
Internal ROM
USB OHCI
USB EHCI
UDP High Speed RAM
LCD User Interface
Video Decoder
DDR Port 0
DDR Port 1
DDR Port 2
DDR Port 3
External Bus Interface
Internal Peripherals
DDR Port 0 is dedicated to the video
, the ARM instruction and data are
AT91SAM9M10
17

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