AT91SAM9M10 ATMEL Corporation, AT91SAM9M10 Datasheet - Page 34

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AT91SAM9M10

Manufacturer Part Number
AT91SAM9M10
Description
At91 Arm Thumb-based Microcontrollers
Manufacturer
ATMEL Corporation
Datasheet

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8.6
34
Slow Clock Selection
AT91SAM9M10
Figure 8-2.
The AT91SAM9M10 slow clock can be generated either by an external 32768Hz crystal or the
on-chip RC oscillator. The 32768 Hz crystal oscillator can be bypassed, by setting the bit
OSC32BYP, to accept an external slow clock on XIN32.
The internal RC oscillator and the 32768 Hz oscillator can be enabled by setting to 1 respec-
tively RCEN bit and OSC32EN bit in the system controller user interface. OSCSEL command
selects the slow clock source.
RCEN, OSC32EN,OSCSEL and OSC32BYP bits are located in the slow clock control register
(SCKCR) located at address 0xFFFFFD50 in the backup part of the system controller and so are
preserved while VDDBU is present.
Clock Generator Block Diagram
XOUT32
XIN32
XOUT
XIN
Clock Generator
Management
12M Main
PLLA and
Slow Clock
Controller
On Chip
RC OSC
Oscillator
Status
Oscillator
Divider
Power
UPLL
Control
RCEN
Slow Clock
SLCK
OSCSEL
OSC32EN
OSC32BYP
Main Clock
MAINCK
UPLLCK
PLLA Clock
PLLACK
6355AS–ATARM–06-Jan-10

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