PIC16C926 Microchip Technology Inc., PIC16C926 Datasheet - Page 82
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PIC16C926
Manufacturer Part Number
PIC16C926
Description
64/68-pin Cmos Microcontrollers With Lcd Driver
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16C926.pdf
(182 pages)
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PIC16C925/926
10.3
The ADCON1 and TRIS registers control the operation
of the A/D port pins. The port pins that are desired as
analog inputs must have their corresponding TRIS bits
set (input). If the TRIS bit is cleared (output), the digital
output level (V
The A/D operation is independent of the state of the
CHS<2:0> bits and the TRIS bits.
FIGURE 10-3:
10.4.1
The ADRESH:ADRESL register pair is the location
where the 10-bit A/D result is loaded at the completion
of the A/D conversion. This register pair is 16-bits wide.
The A/D module gives the flexibility to left or right justify
the 10-bit result in the 16-bit result register. The A/D
Format Select bit (ADFM) controls this justification.
Figure 10-4 shows the operation of the A/D result justi-
fication. The extra bits are loaded with ’0’s’. When an
A/D result will not overwrite these locations (A/D dis-
able), these registers may be used as two general pur-
pose 8-bit registers.
DS39544A-page 80
Note 1: When reading the port register, any pin
Configuring Analog Port Pins
2: Analog levels on any pin that is defined as
A/D RESULT REGISTERS
configured as an analog input channel will
read as cleared (a low level). Pins config-
ured as digital inputs will convert an ana-
log input. Analog levels on a digitally
configured input will not affect the conver-
sion accuracy.
a digital input (including the AN<4:0>
pins), may cause the input buffer to con-
sume current that is out of the device
specifications.
T
CY
Set GO bit
OH
Holding capacitor is disconnected from analog input (typically 100 ns)
to T
or V
AD
OL
Conversion Starts
A/D CONVERSION T
T
) will be converted.
AD
1
T
AD
b9
2
T
AD
b8
3
T
AD
b7
AD
4
CYCLES
T
Preliminary
AD
b6
5
T
AD
b5
6
10.4
Clearing the GO/DONE bit during a conversion will
abort the current conversion. The A/D result register
pair will NOT be updated with the partially completed
A/D conversion sample. That is, the ADRESH:ADRESL
registers will continue to contain the value of the last
completed conversion (or the last value written to the
ADRESH:ADRESL registers). After the A/D conversion
is aborted, a 2T
acquisition is started. After this 2T
on the selected channel is automatically started. After
this, the GO/DONE bit can be set to start the
conversion.
In Figure 10-3, after the GO bit is set, the first time seg-
ment has a minimum of T
ADRES is loaded,
GO bit is cleared,
ADIF bit is set,
holding capacitor is connected to analog input.
A 2T
acquisition is started.
T
AD
b4
Note:
7
AD
wait is necessary before the next
T
AD
b3
A/D Conversions
8
The GO/DONE bit should NOT be set in
the same instruction that turns on the A/D.
T
AD
b2
AD
9
T
wait is required before the next
AD
b1
10 T
CY
2001 Microchip Technology Inc.
and a maximum of T
AD
b0
11
AD
wait, acquisition
AD
.