TSS463C ATMEL Corporation, TSS463C Datasheet - Page 12

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TSS463C

Manufacturer Part Number
TSS463C
Description
Van Data Link Controller With Serial Interface
Manufacturer
ATMEL Corporation
Datasheet

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Figure 9. Asynchronous Software Reset with UART Intel Mode
Oscillator
12
TSS463C
SCLK
MOSI
SS
Reset Internal Pulse
4 XTAL Min
An oscillator is integrated in the TSS463C, and consists of an inverting amplifier of that
the input is XTAL1 and the output XTAL2.
A parallel resonance quartz crystal or ceramic resonator must be connected to these
pins. As shown in Figure 5, two capacitors have to be connected from the crystal pins to
ground. The values of C2 depend on the frequency chosen and can be selected using
the schematic given in Figure 39.
If the oscillator is not used, then a clock signal must be fed to the circuit via the XTAL1
input.
Note that this pin will behave as a CMOS level compatible Schmitt trigger input.
In this case the XTAL2 output should be left unconnected. The oscillator also features a
buffered clock output pin CKOUT. The signal in this pin is directly buffered from the
XTAL1 input, without inversion.
There is one more pin used for the oscillator. The TEST/VSS pin is in fact its ground,
and unless this pin is firmly connected to ground, with decoupling capacitors, the oscilla-
tor will not operate correctly.
The test mode itself, i.e., when the TEST/VSS pin is held high, is only intended for fac-
tory use, and the functionality of this mode is not specified in any way.
The TEST/VSS pin is subject to change without notice, the only exception is for incom-
ing inspection tests using the test program.
The clock signal is then fed to the clock generator that generates all the necessary tim-
ing signals for the operation of the circuit. The clock generator is controlled by a 4-bit
code called the clock divider.
f TSCLK
(
0xFF
)
=
f XTAL1
------------------------ -
(
n
×
16
)
Detection of Forbidden Control
0xFF
15 XTAL Min
End of Chip Select
7601B–AUTO–02/06

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