DS32C35 Maxim Integrated Products, Inc., DS32C35 Datasheet - Page 15

• Manufacturer Part Number: DS32C35
• Description: Accurate I2c Rtc With Integrated Tcxo/crystal/fram
• Manufacturer: Maxim Integrated Products, Inc.

Bit 7: Oscillator Stop Flag (OSF). A logic 1 in this bit
indicates that the oscillator either is stopped or was
stopped for some period and may be used to judge the
validity of the timekeeping data. This bit is set to logic 1
any time that the oscillator stops. The following are
examples of conditions that can cause the OSF bit to
be set:
1) The first time power is applied.
2) The voltages present on both V
3) The EOSC bit is turned off in battery-backed mode.
4) External influences on the crystal (i.e., noise, leak-
This bit remains at logic 1 until written to logic 0.
Bit 3: Enable 32kHz Output (EN32kHz). This bit con-
trols the status of the 32kHz pin. When set to logic 1,
the 32kHz pin is enabled and outputs a 32.768kHz
square-wave signal. When set to logic 0, the 32kHz pin
goes to a high-impedance state. The initial power-up
state of this bit is logic 1, and a 32.768kHz square-wave
signal appears at the 32kHz pin after a V
the device.
Bit 2: Busy (BSY). This bit indicates the device is busy
executing TCXO functions. It goes to logic 1 when the
conversion signal to the temperature sensor is asserted
and then is cleared when the device is in the 1-minute
insufficient to support oscillation.
age, etc.).
BIT 7
BIT 7
Sign
OSF
BIT 6
BIT 6
Data
0
Status Register (0Fh)
BIT 5
Accurate I
BIT 5
Data
0
CC
____________________________________________________________________
CC
and V
is applied to
BAT
BIT 4
BIT 4
Data
0
are
2
idle state. When active, the BSY signal prevents the
CONV signal from aborting the execution of the TCXO
algorithm and starting a new execution of TCXO function.
Bit 1: Alarm 2 Flag (A2F). A logic 1 in the alarm 2 flag
bit indicates that the time matched the alarm 2 regis-
ters. If the A2IE bit is logic 1 and the INTCN bit is set to
logic 1, the INT/SQW pin is also asserted. A2F is
cleared when written to logic 0. This bit can only be
written to logic 0. Attempting to write to logic 1 leaves
the value unchanged.
Bit 0: Alarm 1 Flag (A1F). A logic 1 in the alarm 1 flag
bit indicates that the time matched the alarm 1 regis-
ters. If the A1IE bit is logic 1 and the INTCN bit is set to
logic 1, the INT/SQW pin is also asserted. A1F is
cleared when written to logic 0. This bit can only be
written to logic 0. Attempting to write to logic 1 leaves
the value unchanged.
The Aging Offset register provides an 8-bit code to add
to the codes in the capacitance array registers. The
code is encoded in two’s complement. One LSB repre-
sents one small capacitor to be switched in or out of
the capacitance array at the crystal pins.
The change in ppm per LSB is different at different temper-
atures. The frequency vs. temperature curve is distorted
by the values used in this register. At +23°C, one LSB typi-
cally provides approximately 0.1ppm change in frequency.
EN32kHz
C RTC with Integrated
BIT 3
BIT 3
Data
TCXO/Crystal/FRAM
BIT 2
BIT 2
Data
BSY
Status Register (0Fh)
BIT 1
BIT 1
Data
Aging Offset (10h)
A2F
Register (10h)
Aging Offset
BIT 0
BIT 0
Data
A1F
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