DS32C35 Maxim Integrated Products, Inc., DS32C35 Datasheet - Page 5

• Manufacturer Part Number: DS32C35
• Description: Accurate I2c Rtc With Integrated Tcxo/crystal/fram
• Manufacturer: Maxim Integrated Products, Inc.

POWER-SWITCH CHARACTERISTICS
(T
WARNING: Negative undershoots below -0.3V while the part is in battery-backed mode may cause loss of data.
Note 1: Limits at -40°C are guaranteed by design and not production tested.
Note 2: All voltages are referenced to ground.
Note 3: To minimize current drain on V
Note 4: The pullup resistor voltage on the 32kHz and INT/SQW pins can be up to 5.5V maximum regardless of the voltage on V
Note 5: Current is the averaged input current, which includes the temperature conversion current.
Note 6: The RST pin has an internal 50kΩ (nominal) pullup resistor to V
Note 7: After this period, the first clock pulse is generated.
Note 8: A device must internally provide a hold time of at least 300ns for the SDA signal (referred to as the V
Note 9: The maximum t
Note 10: A fast-mode device can be used in a standard-mode system, but the requirement t
Note 11: C
Note 12: The parameter t
Note 13: This delay applies only if the oscillator is enabled and running. If the EOSC bit is a 1, t
V
V
V
V
Recovery at Power-Up
A
CC
CC
PF(MIN)
PF(MAX)
= -40°C to +85°C, Note 1, see the Power-Switch Timing diagram.)
Fall Time; V
Rise Time; V
V
nal) to bridge the undefined region of the falling edge of SCL.
is automatically the case if the device does not stretch the low period of the SCL signal. If such a device does stretch the
low period of the SCL signal, it must output the next data bit to the SDA line t
before the SCL line is released.
0.0V ≤ V
ly goes high. The state of RST does not affect the I
PARAMETER
BAT
B
—total capacitance of one bus line in pF.
- 0.6V. Otherwise, there is significant current drain due to the input stage at the SCL and SDA pins.
PF(MAX)
CC
PF(MIN)
≤ V
CC(MAX)
HD:DAT
to
OSF
to
is the period of time the oscillator must be stopped for the OSF flag to be set over the voltage range of
needs only to be met if the device does not stretch the low period (t
and 2.0V ≤ V
SYMBOL
Accurate I
t
t
VCCR
t
VCCF
BAT
REC
_____________________________________________________________________
when the internal supply is switched to V
BAT
(Note 13)
≤ 3.6V.
2
C interface, RTC, TCXO, or FRAM operation.
CONDITIONS
2
C RTC with Integrated
CC
.
TCXO/Crystal/FRAM
BAT
R(MAX)
, the V
SU:DAT
+ t
IH
REC
SU:DAT
MIN
300
minimum must be higher than
0
is bypassed and RST immediate-
≥ 250ns must then be met. This
LOW
= 1000 + 250 = 1250ns
) of the SCL signal.
TYP
IH(MIN)
MAX
300
of the SCL sig-
UNITS
ms
µs
µs
CC
.
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