MC56F8366 Freescale Semiconductor, Inc, MC56F8366 Datasheet - Page 123

• Manufacturer Part Number: MC56F8366
• Description: 56f8300 16-bit Digital Signal Controllers
• Manufacturer: Freescale Semiconductor, Inc

6.5.6.14
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
6.5.7
The CLKO select register can be used to multiplex out any one of the clocks generated inside the clock
generation and SIM modules. The default value is SYS_CLK. All other clocks primarily muxed out are
for test purposes only, and are subject to significant unspecified latencies at high frequencies.
The upper four bits of the GPIOB register can function as GPIO, A[23:20], or as additional clock output
signals. GPIO has priority and is enabled/disabled via the GPIOB_PER. If GPIO B[7:4] are programmed
to operate as peripheral outputs, then the choice between A[23:20] and additional clock outputs is done
here in the CLKOSR. The default state is for the peripheral function of GPIO B[7:4] to be programmed as
A[23:20]. This can be changed by altering A[23:20] as shown in
6.5.7.1
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
6.5.7.2
6.5.7.3
6.5.7.4
6.5.7.5
Freescale Semiconductor
Preliminary
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Base + $A
RESET
0 = Peripheral output function of GPIO B7 is defined to be A23
1 = Peripheral output function of GPIO B7 is defined to be the oscillator clock (MSTR_OSC; see
Figure
0 = Peripheral output function of GPIOB6 is defined to be A22
1 = Peripheral output function of GPIOB6 is defined to be SYS_CLK2
0 = Peripheral output function of GPIOB5 is defined to be A21
1 = Peripheral output function of GPIOB5 is defined to be SYS_CLK
0 = Peripheral output function of GPIOB4 is defined to be A20
1 = Peripheral output function of GPIOB4 is defined to be the prescaler clock (FREF; see
Read
Write
CLKO Select Register (SIM_CLKOSR)
Reserved—Bit 2–0
Reserved—Bits 15–10
Alternate GPIOB Peripheral Function for A23 (A23)—Bit 9
Alternate GPIOB Peripheral Function for A22 (A22)—Bit 8
Alternate GPIOB Peripheral Function for A21 (A21)—Bit 7
Alternate GPIOB Peripheral Function for A20 (A20)—Bit 6
3-4)
15
0
0
14
0
0
Figure 6-9 CLKO Select Register (SIM_CLKOSR)
13
0
0
12
0
0
56F8366 Technical Data, Rev. 6
11
0
0
10
0
0
A23
9
0
A22
8
0
A21
7
0
Figure
A20
6
0
CLK
DIS
5
1
6-9.
4
0
3
0
CLKOSEL
2
0
Register Descriptions
Figure
1
0
3-4)
0
0
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