MC56F8366 Freescale Semiconductor, Inc, MC56F8366 Datasheet - Page 21
![no-image](/images/manufacturer_photos/0/2/263/freescale_semiconductor__inc_sml.jpg)
MC56F8366
Manufacturer Part Number
MC56F8366
Description
56f8300 16-bit Digital Signal Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC56F8366.pdf
(184 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC56F8366MFV60
Manufacturer:
Power-one
Quantity:
268
Company:
Part Number:
MC56F8366MFVE
Manufacturer:
Freescale
Quantity:
440
Company:
Part Number:
MC56F8366MFVE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC56F8366MFVE
Manufacturer:
FREESCALE
Quantity:
20 000
Part Number:
MC56F8366VFV60
Manufacturer:
FREESCALE
Quantity:
20 000
Company:
Part Number:
MC56F8366VFVE
Manufacturer:
Freescale
Quantity:
43
Company:
Part Number:
MC56F8366VFVE
Manufacturer:
MOTOLOLA
Quantity:
439
Company:
Part Number:
MC56F8366VFVE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC56F8366VFVE
Manufacturer:
FREESCALE
Quantity:
20 000
Freescale Semiconductor
Preliminary
Signal Name
(GPIOA0)
(GPIOA1)
(GPIOA2)
(GPIOA3)
(GPIOA4)
(GPIOA5)
(GPIOA6)
(GPIOA7)
(GPIOE2)
(GPIOE3)
A10
A11
A12
A13
A14
A15
A6
A7
A8
A9
Table 2-2 Signal and Package Information for the 144-Pin LQFP
Pin No.
17
18
19
20
21
22
23
24
25
26
Schmitt
Schmitt
Output
Output
Output
Output
Input/
Input/
Type
disabled,
pull-up is
disabled,
pull-up is
output is
output is
In reset,
enabled
In reset,
enabled
During
Reset
State
56F8366 Technical Data, Rev. 6
Address Bus — A6 - A7 specify two of the address lines for
external program or data memory accesses.
Depending upon the state of the DRV bit in the EMI bus control
register (BCR), A6–A7 and EMI control signals are tri-stated when the
external bus is inactive.
Most designs will want to change the DRV state to DRV = 1 instead of
using the default setting.
Port E GPIO — These two GPIO pins can be individually
programmed as input or output pins.
After reset, the default state is Address Bus.
To deactivate the internal pull-up resistor, set the appropriate
GPIO bit in the GPIOE_PUR register.
Example: GPIOE2, set bit 2 in the GPIOE_PUR register.
Address Bus— A8 - A15 specify eight of the address lines for
external program or data memory accesses.
Depending upon the state of the DRV bit in the EMI bus control
register (BCR), A8–A15 and EMI control signals are tri-stated when
the external bus is inactive.
Most designs will want to change the DRV state to DRV = 1 instead of
using the default setting.
Port A GPIO — These eight GPIO pins can be individually
programmed as input or output pins.
After reset, the default state is Address Bus.
To deactivate the internal pull-up resistor, set the appropriate
GPIO bit in the GPIOA_PUR register.
Example: GPIOA0, set bit 0 in the GPIOA_PUR register.
Signal Description
Signal Pins
21