MC56F8366 Freescale Semiconductor, Inc, MC56F8366 Datasheet - Page 41

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MC56F8366

Manufacturer Part Number
MC56F8366
Description
56f8300 16-bit Digital Signal Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Note: Data Flash and Program RAM are NOT available on the 56F8166 device.
4.2 Program Map
The operating mode control bits (MA and MB) in the Operating Mode Register (OMR) control the
Program memory map. At reset, these bits are set as indicated in
map configurations that are possible at reset. After reset, the OMR MA bit can be changed and will have
an effect on the P-space memory map, as shown in
effect.
Freescale Semiconductor
Preliminary
Program Boot Flash
1. This bit is only configured at reset. If the Flash secured state changes, this will not be reflected in MB until the next reset.
2. Changing MB in software will not affect Flash memory security.
On-Chip Memory
Flash Secured
Program Flash
Program RAM
OMR MB =
Data Flash
Data RAM
State
0
0
1
1
1, 2
EXTBOOT Pin
OMR MA =
56F8366
512KB
32KB
32KB
32KB
4KB
0
1
0
1
Table 4-1 Chip Memory Configurations
Table 4-2 OMR MB/MA Value at Reset
Mode 0 – Internal Boot; EMI is configured to use 16 address lines; Flash
Memory is secured; external P-space is not allowed; the EOnCE is disabled
Not valid; cannot boot externally if the Flash is secured and will actually
configure to 00 state
Mode 0 – Internal Boot; EMI is configured to use 16 address lines
Mode 1 – External Boot; Flash Memory is not secured; EMI configuration is
determined by the state of the EMI_MODE pin
56F8366 Technical Data, Rev. 6
56F8166
512KB
32KB
32KB
Erase / Program via Flash interface unit and word writes to
CDBW
Erase / Program via Flash interface unit and word writes to
CDBW. Data Flash can be read via either CDBR or XDB2, but
not by both simultaneously
None
None
Erase / Program via Flash Interface unit and word to CDBW
Table
Chip Operating Mode
4-3. Changing the OMR MB bit will have no
Table
Use Restrictions
4-2.
Table 4-4
shows the memory
Program Map
41

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