DSPIC33FJ64MC508 Microchip Technology Inc., DSPIC33FJ64MC508 Datasheet - Page 134

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DSPIC33FJ64MC508

Manufacturer Part Number
DSPIC33FJ64MC508
Description
High-performance, 16-bit Digital Signal Controllers
Manufacturer
Microchip Technology Inc.
Datasheet

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dsPIC33FJXXXMCX06/X08/X10 MOTOR CONTROL FAMILY
REGISTER 7-5:
REGISTER 7-6:
DS70287A-page 132
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-0
Note 1:
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-10
bit 9-0
Note 1:
R/W-0
R/W-0
R/W-0
U-0
2:
If the channel is enabled (i.e., active), writes to this register may result in unpredictable behavior of the
DMA channel and should be avoided.
If the channel is enabled (i.e., active), writes to this register may result in unpredictable behavior of the
DMA channel and should be avoided.
Number of DMA transfers = CNT<9:0> + 1.
PAD<15:0>: Peripheral Address Register bits
Unimplemented: Read as ‘0’
CNT<9:0>: DMA Transfer Count Register bits
R/W-0
R/W-0
R/W-0
U-0
DMAxPAD: DMA CHANNEL x PERIPHERAL ADDRESS REGISTER
DMAxCNT: DMA CHANNEL x TRANSFER COUNT REGISTER
W = Writable bit
W = Writable bit
‘1’ = Bit is set
‘1’ = Bit is set
R/W-0
R/W-0
R/W-0
U-0
R/W-0
R/W-0
R/W-0
U-0
PAD<15:8>
PAD<7:0>
CNT<7:0>
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
(2)
R/W-0
R/W-0
R/W-0
U-0
R/W-0
R/W-0
R/W-0
U-0
© 2007 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
R/W-0
R/W-0
R/W-0
R/W-0
(1)
CNT<9:8>
(1)
R/W-0
R/W-0
R/W-0
(2)
R/W-0
bit 8
bit 0
bit 8
bit 0

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