ST92F124R1 STMicroelectronics, ST92F124R1 Datasheet - Page 195
ST92F124R1
Manufacturer Part Number
ST92F124R1
Description
8/16-bit Single Voltage Flash Mcu Family With Ram, E?? Emulated Eeprom , Can 2.0b And J1850 Blpd
Manufacturer
STMicroelectronics
Datasheet
1.ST92F124R1.pdf
(429 pages)
- Current page: 195 of 429
- Download datasheet (8Mb)
MULTIFUNCTION TIMER (Cont’d)
10.4.3.9 TxINA = Clock Up - TxINB = Clock
Down
The edge received on input pin A (or B) performs a
one step up (or down) count, so that the counter
clock and the up/down control are external. Setting
the UDC bit in the TCR register has no effect in
this configuration, and input pin B has priority on
input pin A.
10.4.3.10 TxINA = Up/Down - TxINB = Ext Clock
An High (or Low) level applied to input pin A sets
the counter in the up (or down) count mode, while
the signal applied to input pin B is used as clock for
the prescaler. Setting the UDC bit in the TCR reg-
ister has no effect in this configuration.
10.4.3.11 TxINA = Trigger Up - TxINB = Trigger
Down
Up/down control is performed through both input
pins A and B. A edge on input pin A sets the up
count mode, while a edge on input pin B (which
has priority on input pin A) sets the down count
mode. The counter clock is internally generated,
and setting the UDC bit in the TCR register has no
effect in this configuration.
10.4.3.12 TxINA = Up/Down - TxINB = I/O
An High (or Low) level of the signal applied on in-
put pin A sets the counter in the up (or down) count
mode. The counter clock is internally generated.
Setting the UDC bit in the TCR register has no ef-
fect in this configuration.
MULTIFUNCTION TIMER (MFT)
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