ADN2806 Analog Devices, Inc., ADN2806 Datasheet - Page 3

• Manufacturer Part Number: ADN2806
• Description: 622 Mbps Clock And Data Recovery Ic
• Manufacturer: Analog Devices, Inc.

SPECIFICATIONS
T
unless otherwise noted.
Table 1.
Parameter
DATA INPUTS—DC CHARACTERISTICS
DATA INPUTS—AC CHARACTERISTICS
LOSS-OF-LOCK (LOL) DETECT
ACQUISITION TIME
DATA RATE READBACK ACCURACY
POWER SUPPLY VOLTAGE
POWER SUPPLY CURRENT
OPERATING TEMPERATURE RANGE
JITTER SPECIFICATIONS
T
unless otherwise noted.
Table 2.
Parameter
PHASE-LOCKED LOOP CHARACTERISTICS
1
Jitter tolerance of the ADN2806 at these jitter frequencies is better than what the test equipment is able to measure.
A
A
Input Voltage Range
Peak-to-Peak Differential Input
Input Common-Mode Level
Data Rate
S11
Output Clock Range
Input Resistance
Input Capacitance
VCO Frequency Error for LOL Assert
VCO Frequency Error for LOL Deassert
LOL Response Time
Lock to Data Mode
Optional Lock to REFCLK Mode
Fine Readback
Jitter Transfer Bandwidth
Jitter Peaking
Jitter Generation
Jitter Tolerance
= T
= T
MIN
MIN
to T
to T
MAX
MAX
, VCC = V
, VCC = V
MIN
MIN
to V
to V
MAX
MAX
, VEE = 0 V, C
, VEE = 0 V, C
Locked to 622.08 Mbps
Conditions
@ PIN or NIN, dc-coupled
PIN − NIN
DC-coupled
@ 622 MHz
Absence of input data
Differential
With respect to nominal
With respect to nominal
OC-12
OC-12
In addition to REFCLK accuracy
OC-12
F
F
= 0.47 μF, SLICEP = SLICEN = VEE, input data pattern: PRBS 2
= 0.47 μF, SLICEP = SLICEN = VEE, input data pattern: PRBS 2
Conditions
OC-12
OC-12, 12 kHz to 5 MHz
OC-12
OC-12, 2
Rev. 0 | Page 3 of 20
30 Hz
300 Hz
25 kHz
250 kHz
1
23
1
1
− 1 PRBS
Min
1.8
0.2
2.3
3.0
–40
Min
100
44
2.5
1.0
Typ
75
0
0.001
0.011
Typ
2.5
622
−15
622 ± 5%
100
0.65
1000
250
200
2.0
20.0
100
3.3
109
Max
130
0.03
0.003
0.026
Max
2.8
2.0
2.8
3.6
+85
23
23
− 1,
− 1,
ADN2806
Unit
kHz
dB
UI rms
UI p-p
UI p-p
UI p-p
UI p-p
UI p-p
Unit
V
V
V
Mbps
dB
MHz
Ω
pF
ppm
ppm
μs
ms
ms
ppm
V
mA
°C