ADN2814 Analog Devices, Inc., ADN2814 Datasheet - Page 23

• Manufacturer Part Number: ADN2814
• Description: Continuous Rate 10 Mb/s To 675 Mb/s Clock And Data Recovery Ic With Integrated Limiting Amp
• Manufacturer: Analog Devices, Inc.

DC-COUPLED APPLICATION
The inputs to the ADN2814 can also be dc-coupled. This may
be necessary in burst mode applications, where there are long
periods of CIDs, and baseline wander cannot be tolerated. If the
inputs to the ADN2814 are dc-coupled, care must be taken not
to violate the input range and common-mode level require-
ments of the ADN2814 (see Figure 27 through Figure 29). If dc
coupling is required, and the output levels of the TIA do not
adhere to the levels shown in Figure 28, then level shifting
and/or an attenuator must be between the TIA outputs and the
ADN2814 inputs.
V
V
VTH = ADN2813 QUANTIZER THRESHOLD
NOTES:
1. DURING DATA PATTERNS WITH HIGH TRANSITION DENSITY, DIFFERENTIAL DC VOLTAGE AT V1 AND V2 IS ZERO.
2. WHEN THE OUTPUT OF THE TIA GOES TO CID, V1 AND V1b ARE DRIVEN TO DIFFERENT DC LEVELS. V2 AND V2b DISCHARGE TO THE
3. WHEN THE BURST OF DATA STARTS AGAIN, THE DIFFERENTIAL DC OFFSET ACROSS THE AC COUPLING CAPACITORS IS APPLIED TO
4. THE DC OFFSET SLOWLY DISCHARGES UNTIL THE DIFFERENTIAL INPUT VOLTAGE EXCEEDS THE SENSITIVITY OF THE ADN2814. THE
V1b
V2b
DIFF
DIFF
V1
V2
VREF LEVEL, WHICH EFFECTIVELY INTRODUCES A DIFFERENTIAL DC OFFSET ACROSS THE AC COUPLING CAPACITORS.
THE INPUT LEVELS CAUSING A DC SHIFT IN THE DIFFERENTIAL INPUT . THIS SHIFT IS LARGE ENOUGH SUCH THAT ONE OF THE STATES,
EITHER HIGH OR LOW DEPENDING ON THE LEVELS OF V1 AND V1b WHEN THE TIA WENT TO CID, IS CANCELED OUT. THE QUANTIZER
DOES NOT RECOGNIZE THIS AS A VALID STATE.
QUANTIZER CAN RECOGNIZE BOTH HIGH AND LOW STATES AT THIS POINT.
VCC
= V2–V2b
1
TIA
VCC
Figure 27. DC-Coupled Application
0.1μF
50Ω
50Ω
TIA
PIN
NIN
VREF
V1b
50Ω
V1
ADN2814
C
C
50Ω
IN
IN
2
3kΩ
V2b
V2
PIN
NIN
50Ω
50Ω
Figure 26. Example of Baseline Wander
2.5V
ADN2814
V
REF
Rev. 0 | Page 23 of 28
+
–
LIMAMP
3
CDR
NIN
NIN
PIN
PIN
Figure 29. Maximum Allowed DC-Coupled Input Levels
Figure 28. Minimum Allowed DC-Coupled Input Levels
C
C
OUT
OUT
V p-p = PIN – NIN = 2
V p-p = PIN – NIN = 2
DATAOUTP
DATAOUTN
4
×
×
V
V
SE
SE
= 10mV AT SENSITIVITY
= 2.0V MAX
V
V
SE
V
(DC-COUPLED)
SE
CM
V
(DC-COUPLED)
= 1.0V MAX
ADN2814
CM
= 5mV MIN
= 2.3V
= 2.3V MIN
VREF
VTH