MT41J512M8 Micron Semiconductor Products, MT41J512M8 Datasheet - Page 9

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MT41J512M8

Manufacturer Part Number
MT41J512M8
Description
Twindietm Ddr3 Sdram Mt41j1g4 ? 64 Meg X 4 X 8 Banks X 2 Ranks Mt41j512m8 ? 32 Meg X 8 X 8 Banks X 2 Ranks
Manufacturer
Micron Semiconductor Products
Datasheet

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Electrical Specifications
Table 4:
Temperature and Thermal Impedance
PDF: 09005aef83188bab/Source: 09005aef83169de6
MT41J1G4_64M_32M_twindie.fm - Rev. F 11/09 EN
V
Symbol
IN
V
I
V
T
VREF
, V
DDQ
T
STG
DD
I
I
C
OUT
Parameter
V
V
Voltage on any ball relative to V
Input leakage current
Any input 0V ≤ V
V
(All other pins not under test = 0V)
V
V
(All other pins not under test = 0V)
Operating case temperature
Storage temperature
Absolute Maximum Ratings
DD
DD
REF
REF
REFDQ
supply voltage relative to V
supply voltage relative to V
pin 0V ≤ V
supply leakage current
= V
Notes: 1. V
DD
/2 or V
Stresses greater than those listed may cause permanent damage to the device. This is a
stress rating only, and functional operation of the device at these or any other conditions
outside those indicated in the device data sheet is not implied. Exposure to absolute
maximum rating conditions for extended periods may adversely affect reliability.
IN
It is imperative that the DDR3 SDRAM device’s temperature specifications, shown in
Table 5 on page 10, be maintained to ensure the junction temperature is in the proper
operating range to meet data sheet specifications. An important step in maintaining the
proper junction temperature is using the device’s thermal impedances correctly. Ther-
mal impedances listed in Table 6 on page 10 apply to the current die revision and pack-
ages.
Incorrectly using thermal impedances can produce significant errors. Read Micron tech-
nical note
Table 6. For designs that are expected to last several years and require the flexibility to
use several DRAM die shrinks, consider using final target theta values (rather than exist-
ing values) to account for increased thermal impedances from the reduction in die size.
The DDR3 SDRAM device’s safe junction temperature range can be maintained when
the T
ature is too high, use of forced air and/or heat sinks may be required to satisfy the case
temperature specifications.
2. The minimum limit requirement is for testing purposes. The leakage current on the V
3. MAX operating case temperature. T
4. Device functionality is not guaranteed if the DRAM device exceeds the maximum T
IN
≤ 1.1V
≤ V
greater than 0.6 × V
pin should be minimal.
Figure 5 on page 10).
ing operation.
REFCA
C
DD
DD
specification is not exceeded. In applications where the device’s ambient temper-
and V
,
= V
TN-00-08: “Thermal Applications,”
DD
DDQ
/2
SS
SSQ
SS
must be within 300mV of each other at all times, and V
DDQ
. When V
9
Min
–0.4
–0.4
–0.4
–55
–4
–2
0
DD
C
and V
is measured in the center of the package (see
Micron Technology, Inc., reserves the right to change products or specifications without notice.
DDQ
4Gb: x4, x8 TwinDie DDR3 SDRAM
prior to using the thermal impedances in
1.975
1.975
1.975
Max
150
+4
+2
95
are less than 500mV, V
Electrical Specifications
Units
©2008 Micron Technology, Inc. All rights reserved.
µA
µA
°C
°C
V
V
V
REF
REF
may be ≤300mV.
must not be
Notes
3, 4
1
2
C
dur-
REF

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