CAT24C05 Catalyst Semiconductor, CAT24C05 Datasheet - Page 8

• Manufacturer Part Number: CAT24C05
• Description: 4-kb I?c Cmos Serial Eeprom With Partial Array Write Protection
• Manufacturer: Catalyst Semiconductor

CAT24C03/05
READ OPERATIONS
Immediate Read
Upon receiving a Slave address with the R/W bit set to
‘1’, the CAT24C03/05 will interpret this as a request for
data residing at the current byte address in memory.
The CAT24C03/05 will acknowledge the Slave address,
will immediately shift out the data residing at the current
address, and will then wait for the Master to respond.
If the Master does not acknowledge the data (NoACK)
and then follows up with a STOP condition (Figure 9),
the CAT24C03/05 returns to Standby mode.
Selective Read
Selective Read operations allow the Master device to
select at random any memory location for a read opera-
tion. The Master device first performs a ‘dummy’ write
operation by sending the START condition, slave address
and byte address of the location it wishes to read. After
the CAT24C03/05 acknowledges the byte address, the
Master device resends the START condition and the
slave address, this time with the R/W bit set to one. The
CAT24C03/05 then responds with its acknowledge and
sends the requested data byte. The Master device does
not acknowledge the data (NoACK) but will generate a
STOP condition (Figure 10).
Sequential Read
If during a Read session, the Master acknowledges
st
the 1
data byte, then the CAT24C03/05 will continue
transmitting data residing at subsequent locations until
the Master responds with a NoACK, followed by a STOP
(Figure 11). In contrast to Page Write, during Sequential
Read the address count will automatically increment to
and then wrap-around at end of memory (rather than
end of page).
© 2006 by Catalyst Semiconductor, Inc.
Doc. No. 1116, Rev. B
8
Characteristics subject to change without notice