MB85RC128 Fujitsu, MB85RC128 Datasheet - Page 8

• Manufacturer Part Number: MB85RC128
• Description: 128 K (16 K x 8) Bit I2C
• Manufacturer: Fujitsu

MB85RC128
■ COMMAND
Note : In the MB85RC128, input “00” as the upper 2 bits of the MSB.
Note : It is not necessary to take a period for internal write programming cycles from the buffer to the memory
8
S
S
• Byte Write
If the 8th bit of the device address word (R/W = 0) is sent following the start condition, the slave responds
with an ACK. After this ACK, write addresses and data are sent in the same way, and the write ends by
master, generating a stop condition at the end.
• Page Write
If additional 8bits are sent after the same command as Byte Write, a page write is performed. If more bytes
are sent than will fit up to the end of the address, the address rolls over to 0000
8KBytes are sent, the data is overwritten in order starting from the start of the FRAM memory address that
was written first. Because FRAM performs write operations at bus speed, the data will be written to FRAM
after the ACK response finishes immediately.
1 0 1 0
1 0 1 0
after the stop condition is generated.
A2 A1 A0
A2 A1 A0
0
0
A
A
0 0 X X X X X X
High 8bits
High 8bits
MSB
Address
Address
A
A
X X X X X X X X
Low 8bits
Low 8bits
Address
Address
LSB
A
A
Data 8bits
Data 8bits
Write
Write
A P
A
A
A
S
P
S
P
Write
Data
Access from slave
ACK
Access from master
ACK
Start Condition
Stop Condition
Access from slave
Access from master
Start Condition
Stop Condition
H
. Therefore, if more than
DS05–13110–3E
...
A P