L6223A ST Microelectronics, Inc., L6223A Datasheet - Page 10

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L6223A

Manufacturer Part Number
L6223A
Description
Dmos Programmable High Speed Unipolar Stepper Motor Driver
Manufacturer
ST Microelectronics, Inc.
Datasheet
L6223A
Operating Mode
The bit C5 defines the two available input configu-
rations.
C5 = H: FULL MODE OPERATING
The digital inputs have the following functions:
Since each input drives one phase of the motor it
is possible to work either in Half Step or in Full
Step mode. DA/OPLO defines the current control
mode as follow:
– DA/OPLO = H open loop
– DA/OPLO = L closed loop
The reduced current level is enabled by the inputs
IN1, IN2, IN3, IN4 or by DA/CLEV (Tab. 2). The
reduced current value depends from the bits C0,
C1 (TAB. 5). The outputs are disabled when the
inputs are in a prohibited state (Tab. 4).
C5 = L, SIMPLIFIED MODE OPERATING
When in SIMPLIFIED MODE OPERATING the in-
puts assume the following functions:
mode
The SIMPLIFIED MODE OPERATING configura-
tion does not allow the drive of a unipolar motor in
Half step.
The signal DA/OPLO functions as in FULL Mode
Operation. When the current control is imple-
mented in closed loop, the reduced current level
is enabled by the inputs IN4, DA/CLEV (Tab. 3).
The current reduction depends from the bits C0,
C1 (Tab. 5).
Open/Closed Loop Motor Current Control
The logic input DA/OPLO selects the current con-
trol mode as previously seen. When in open loop,
the chopping frequency is that one as defined by
the external RC network. In open loop are avail-
able three different t(ON), depending from the bits
C2, C3 (Tab. 6), as a percentage of the RC dis-
charge time t
10/33
(see Tab 2)
mode (open or close loop).
IN1 drives Phase A
IN2 drives Phase B
IN3 ENABLE input (active High)
IN4 enables the reduced current (Tab. 3)
DA/CLEV enables the reduced current (Tab. 3)
IN1 drives OUT1
IN2 drives OUT2
IN3 drives OUT3
IN4 drives OUT4
DA/CLEV enables the current reduction
DA/OPLO selects the motor current control
DA/OPLO selects the motor current control
(dis)
.
The output DMOS is ON
when the corrisponding in-
put is low
When in closed loop two different chopping fre-
quencies are selectable by means of the bit C4
(Tab. 7). The higher is defined by the external RC
network. The other one is exactely the half. In
closed loop 5 different current levels are avail-
able: the nominal current level and four reduced
current levels (Tab. 5). The nominal current level
is set by an internal reference voltage of 0.5V.
The configuration of bits C0, C1 sets the refer-
ence voltage to a pecentage of the nominal value.
TRUTH TABLES (L = Low; H = High; X = don’t
care)
Table 2
*) C/R = H, reduced current
Table 3
*) Reduced current **) Nominal current
Table 4
Table 5
*) Nominal level percentage
IN1
IN1
H
X
H
X
X
L
C0
H
H
L
L
IN4
X
H
L
IN2
H
H
IN2
X
X
X
L
C1
H
H
L
L
IN3
H
H
X
X
IN3
X
DA/CLEV
L
Reduced Current Level (*)
H
X
L
IN4
H
H
X
X
IN4
X
L
40%
50%
70%
85%
DA/CLEV
Output Stage
H
X
X
X
DISABLED
DISABLED
C/R
L**
H*
H*
C/R*
H
H
H
H

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