CMX969 Consumer Microcircuits Limited, CMX969 Datasheet - Page 25

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CMX969

Manufacturer Part Number
CMX969
Description
RD-LAP/MDC4800/Motient/ARDIS4-Level FSK Packet Data Modem 
Manufacturer
Consumer Microcircuits Limited
Datasheet

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RD-LAP/MDC4800 Motient/ARDIS
Lowpass Filter Delay
The previous task timing figures are based on the signal at the input to the low pass filter (in transmit mode) or
the input to the de-interleave buffer (in receive mode). In RD-LAP mode there is an additional delay of about 8
symbol times through to the RRC filter in both transmit and receive modes, as illustrated below: The
corresponding delay in MDC mode is about 3 symbol times.
2001 Consumer Microcircuits Limited
t3
t6
t7
t3
t6
t7
RD-LAP Receive Task Timings
Time to receive all symbols of block or
Frame Sync pattern
Maximum time between first symbol of the
Block or Frrame Sync pattern entering the
de-interleave circuit and the task or AFSD
being written to the modem’s Command
Register.
Maximum time from the last bit of the block
or Frame Sync pattern entering the de-
interleave circuit to BFREE or AFSDET
going to logic ‘1’ (high)
MDC Receive Task Timings
Time to receive all symbols of block or
Frame Sync pattern
Maximum time between first symbol of the
Block or Frame Sync pattern entering the
de-
interleave circuit and the task or AFSD being
written to the modem’s Command Register
Maximum time from the last bit of the block
or Frame Sync pattern entering the de-
Interleave circuit to BFREE or AFSDET
Going to a logic ‘1’ (high).
Figure 11 RRC Low Pass Filter Delay (RD-LAP mode)
T x S y m b o l to R R C F i l t e r
T x S y m b o l a t T x o p p i n / R x S y m b o l f r o m F M d i s c r i m i n a t o r
25
R x S y m b o l t o D e - i n t e r l e a v e B u f f e r
S y m b o l - t i m e s
SFS/AFSD
SFS/AFSD
SFS/AFSD
SFS/AFSD
RHB/RILB
RHB/RILB
RHB/RILB
RHB/RILB
RHB/RILB
Task
RSID
RSID
Task
SFP
R4S
SFS
SFP
R4S
R8B
R8B
R8B
Any
(symbol times)
(symbol times)
Time
Time
112
25
48
23
69
21
21
15
51
40
38
13
4
3
1
8
7
2
3
2
CMX969
D/969/5

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