GS1503 Gennum Corporation, GS1503 Datasheet - Page 67

• Manufacturer Part Number: GS1503
• Description: HD Embedded Audio Codec
• Manufacturer: Gennum Corporation

Table 14: Demultiplex Mode Host Interface Registers (Continued)
CONTROL
Packet
Delete
ITEM
DEL1-2A[26:0]
DEL3-4A[26:0]
AF_NOA[8:0]
CTRIDA[1:0]
RSRVA[17:0]
RATEA[2:0]
CTRONA
DEL_SEL
NAME
ASXA
ANCI
RSV
RSV
Ch1-4 synchronization. When set HIGH, the "asx" bit
Ancillary data delete mode select. When set HIGH,
Not used.
Ch1-4 audio control packet demultiplex enable.
When set HIGH, the audio control packets in the
Luma channel of the video data stream for audio
channels 1 to 4 will be demultiplexed.
Ch1-4 audio control packet DID setting. Designates
the audio control packet DID for audio channels 1
to 4. See Table 13. The default setting is audio
group 1.
Ch1-4 audio frame number. Designates the audio
frame number for audio channels 1 to 4.
Ch1-4 sampling frequency. Designates the audio
sampling frequency for audio channels 1 to 4, taken
from the RATE word of the audio control packet as
defined in SMPTE 299M.
of the audio control packet RATE word designates
audio channels 1 to 4 as asynchronous, as per
SMPTE 299M. When set LOW, the "asx" bit of the
audio control packet RATE word designates
synchronous audio.
Ch1/2 delay data. Designates the accumulated
audio processing delay relative to video for audio
channels 1 and 2.
Ch3/4 delay data. Designates the accumulated
audio processing delay relative to video for audio
channels 3 and 4.
Ch1-4 reserve words. Designates the value set in
the RSRV words of the audio control packet for
audio channels 1 to 4, as per SMPTE 299M.
Not used.
Ancillary data delete. When set HIGH, all ancillary
data packets ("DEL_SEL" is LOW) or ancillary data
packets with DIDs designated in Host Interface
registers 041h and 042h ("DEL_SEL" is HIGH) are
removed from the video signal. The ancillary data
packets are replaced with blanking codes. The data
contained in the packets are output at the
corresponding pins. When set LOW, all ancillary
data packets remain in the video signal.
NOTE: The status of the ANCI external pin is not
updated in this register. The value programmed in
this register is logical OR'd with the ANCI external
pin setting
individual audio groups can be deleted from the
video signal by programming Host Interface
register 041h. When set LOW, all ancillary data
packets are deleted from the video signal.
DESCRIPTION
67
ADDRESS
03C
03D
02F
030
031
032
033
034
035
036
037
038
039
03A
03B
040
BIT
7-3
1-0
7-0
3-1
1-0
7-0
7-0
7-0
1-0
7-0
7-0
7-0
1-0
7-0
7-0
7-2
2
0
0
1
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
-
-
DEFAULT
15879 - 1
11b
0
1
0
0
0
0
0
0
0
0
0