GS1559-CBE2 Gennum Corp., GS1559-CBE2 Datasheet - Page 62

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GS1559-CBE2

Manufacturer Part Number
GS1559-CBE2
Description
HD-LINX II Multi-Rate Deserializer with Loop-Through Cable Driver
Manufacturer
Gennum Corp.
Datasheet

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4.11.2 Parallel Output in SMPTE Mode
4.11.3 Parallel Output in DVB-ASI Mode
4.11.4 Parallel Output in Data-Through Mode
4.11.5 Parallel Output Clock (PCLK)
When the device is operating in SMPTE mode, (see
data may be presented to the output bus in either multiplexed or demultiplexed
form depending on the setting of the 20bit/10bit input pin.
In 20-bit mode, (20bit/10bit = HIGH), the output data will be word aligned,
demultiplexed luma and chroma data. Luma words will always appear on
DOUT[19:10] while chroma words will occupy DOUT[9:0].
In 10-bit mode, (20bit/10bit = LOW), the output data will be word aligned,
multiplexed luma and chroma data. The data will be presented on DOUT[19:10],
and the device will force DOUT[9:0] LOW.
When operating in DVB-ASI mode, (see
configures the output port for 10-bit operation regardless of the setting of the
20bit/10bit pin.
The extracted 8-bit data words will be presented on DOUT[17:10] such that
DOUT17 = HOUT is the most significant bit of the decoded transport stream data
and DOUT10 = AOUT is the least significant bit.
In addition, DOUT19 and DOUT18 will be configured as the DVB-ASI status
signals SYNCOUT and WORDERR respectively. See
description of these DVB-ASI specific output signals.
DOUT[9:0] will be forced LOW when the GS1559 is operating in DVB-ASI mode.
When operating in Data-Through mode, (see
data to the output data bus without performing any decoding, descrambling or
word-alignment.
As described in
device is set to operate in master mode but cannot identify SMPTE TRS ID or
DVB-ASI sync words in the input data stream.
The frequency of the PCLK output signal of the GS1559 is determined by the
output data format.
their corresponding parallel clock rates. Note that DVB-ASI output will always be in
10-bit format, regardless of the setting of the 20bit/10bit pin.
Proprietary and Confidential
Section
Table 4-16
4.9, the data bus outputs will be forced to logic LOW if the
30572 - 1
below lists the possible output signal formats and
Section
GS1559 Preliminary Data Sheet
November 2004
Section
4.8), the GS1559 automatically
Section
4.9), the GS1559 presents
Section 4.8.2
4.7), both SD and HD
for a
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