CS98200-CB Cirrus Logic, Inc., CS98200-CB Datasheet - Page 34

• Manufacturer Part Number: CS98200-CB
• Description: New Highly-integrated Processor for Tommorrow DVD Players and DVD Receivers
• Manufacturer: Cirrus Logic, Inc.

CS98200
Next Generation DVD Processor
5.12
The UART performs serial-to-parallel conver-
sion on data characters received from a periph-
eral device and parallel-to-serial conversion on
data characters received from the host proces-
sor.
fers over the UART interface.
The CS98200 has 2 UART interfaces based on a
NS16550-compatible design, which incorpo-
rates 16-byte transmit and receive FIFOs to en-
hance performance and throughput. As with
the 16650, it can operate in both FIFO-mode
(16550) or in the original non-FIFO mode
(16450). The main registers are identical in
structure to the NS16550, but some unused bits
have been enabled for added functionality.
The standard features are:
• Compatible with 16450 UART
• 16-byte transmit and receive FIFOs reduce
• Generates and detects standard asynchronous
• Independently controlled transmit, receive, line
• Programmable baud rate generator (16 bit
34
R X D
T X D
number of interrupts presented to CPU
communication bits (start, stop and parity) to
and from serial data
status and data set interrupts
divisor)
Figure 22
Universal Asynchronous
Receiver/Transmitters (UARTs)
shows RXD and TXD data trans-
S ta rt
S ta rt
Figure 22. UART Data Transfer
Copyright 2002 Cirrus Logic (All Rights Reserved)
D a ta B its (5 ~ 8 )
D a ta B its (5 ~ 8 )
• Modem control interface (CTS, RTS, DSR, DTR,
• Fully programmable serial-interface
• False start bit detection
• Complete status reporting capabilities
• Line break generation and detection
• Internal loopback diagnostic mode
• Programmable trigger levels for FIFOs
• Selectable DMA signaling mode
• Prioritized interrupts
• Transmitter and receiver FIFO time-out
Additional optimizations:
• Byte enable register allows transfer of up to 4
• External loopback diagnostic mode
• Separate baud clock input available
• Additional receiver error information
RI and DCD)
characteristics:
— 5, 6, 7 or 8 bit characters
— Even, odd or no-parity bit
— 1, 1½, or 2 stop bit generation
interrupts
bytes in a single register write (only in FIFO
mode).
Note: If using separate baud clock, it must be less
generation/detection
than ½ frequency of the system clock,
otherwise, you must use the system clock.
P a rity
P a rity
S to p
S to p
S ta rt
DS581PP2