USB3300 SMSC Corporation, USB3300 Datasheet - Page 35

• Manufacturer Part Number: USB3300
• Description: Hi-Speed USB Host
• Manufacturer: SMSC Corporation

Hi-Speed USB Host, Device or OTG PHY with ULPI Low Pin Interface
Datasheet
SMSC USB3300
6.1.9.2
(ULPI Register Bit)
linestate[0]
linestate[1]
reserved
int
reserved
SUSPENDM
SIGNAL
DATA[7:0]
NXT
CLK
STP
DIR
While in Low Power Mode, the Data interface is redefined so that the Link can monitor Linestate and
the Vbus voltage. In Low Power Mode DATA[3:0] are redefined as shown in
is the combinational output of the full speed receivers. The “int” or interrupt signal indicates an
unmasked interrupt has occurred. When an unmasked interrupt or linestate change has occurred, the
Link is notified and can determine if it should wake-up the PHY.
An unmasked interrupt can be caused by the following comparators changing state, VbusVld, SessVld,
SessEnd, and IdGnd. If any of these signals change state during Low Power Mode and either their
rising or falling edge interrupt is enabled, DATA[3] will assert. During Low Power Mode, the VbusVld
and SessEnd comparators can have their interrupts masked to lower the suspend current. Refer to
Section
While in Low Power Mode, the Data bus is driven asynchronously because all of the PHY clocks are
stopped during Low Power Mode.
Exiting Low Power Mode
To exit Low Power Mode, the Link will assert STP. Upon the assertion of STP, the USB3300 will begin
its start-up procedure. After the PHY start-up is complete, the PHY will start the clock on CLKOUT and
de-assert DIR. Once DIR has been de-asserted, the Link can de-assert STP when ready and start
DATA[2]
DATA[7:4]
DATA[0]
DATA[1]
DATA[3]
Idle
MAPS TO
6.1.9.4.
T0
Table 6.6 Interface Signal Mapping During Low Power Mode
OUT
OUT
OUT
OUT
OUT
DIRECTION
T1
(reg write)
TXD CMD
Figure 6.8 Entering Low Power Mode
T2
DATASHEET
Combinatorial linestate[0] driven directly by FS analog receiver.
Combinatorial linestate[1] driven directly by FS analog receiver.
Driven Low
Active high interrupt indication. Must be asserted whenever any
unmasked interrupt occurs.
Driven Low
T3
35
Reg Data[n]
T4
Idle
DESCRIPTION
T5
Around
Turn
T6
Table
...
Revision 1.06 (07-19-06)
Low Power Mode
6.6. Linestate[1:0]
T10