L64780 LSI Logic Corporation, L64780 Datasheet - Page 118
L64780
Manufacturer Part Number
L64780
Description
Dvb-t Cofdm Demodulator Technical Manual 2/00
Manufacturer
LSI Logic Corporation
Datasheet
1.L64780.pdf
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A.1 Serial Bus Protocol Overview
Figure A.1
A-2
Serial Bus Compliant Device
Serial Bus Overview
The multimaster Serial bus interface has two one-bit lines: A0 (Serial
Clock), and D0 (Serial Data). These are connected to the bus (see
Figure
not in operation. See the Serial Bus protocol documentation for a
detailed explanation and electrical characteristics. D[7:1] are used to set
the serial bus slave address. When using the serial bus, D[7:1] must be
hardwired to set the appropriate device slave address.
Select the serial bus mode on the L64780 by asserting P_S.
Features of the serial bus protocol include:
Figure A.1
Programming the L64780 Using The Serial Bus Interface
Two one-bit lines: A0 and D0.
D0: Serial Data.
A0: serial clock (maximum frequency = 400 kHz).
A0 and D0 have external pull-up resistors (the bus is normally
HIGH).
The Master always generates the clock, A0, and cycle start/stop
conditions.
A.1). External pullup resistors hold the bus at a logic 1 when it is
provides an overview illustration of the serial bus.
Serial Bus Compliant Device
5.0V
5.0V
D0
A0
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