L64780 LSI Logic Corporation, L64780 Datasheet - Page 52

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L64780

Manufacturer Part Number
L64780
Description
Dvb-t Cofdm Demodulator Technical Manual 2/00
Manufacturer
LSI Logic Corporation
Datasheet
3.3.6 ADC Output
Figure 3.28 ADC Output Mapping
3.4 Microprocessor Interface
3-16
18 MHz CLK
26
25
The ADC output lets you probe the internal ADC. The signals are the
digitized input samples (ADC) and the 18 MHz clock. These signals,
which are in two’s complement format, are mapped on the
MUXOUTBUS. See
The microprocessor interface operates in Serial Mode.
Important:
The Serial Bus mode interface is a serial interface operating in slave
mode. Its protocol is compatible with I
detailed description of the Serial Bus, see
signal selects either the serial or parallel mode.
the different modes.
Table 3.4
When in Serial interface mode, D0 is used as a serial data signal, and
A0 is used as a serial clock signal. D[7:1] are used to set the serial bus
slave address. When using the serial bus, D[7:1] must be hardwired to
set the appropriate device slave address.
Interfaces
P_S
Low
High
Mode
Parallel
Serial
A Parallel mode interface is provided for test purposes. This
interface is used for LSI Logic internal testing and is not
intended for use in customer production receivers.
Mode Selection Using the P_S Input Signal
0
Figure
Notes
LSI Internal use only
L64780 Serial Interface
3.28.
2
C specifications. For a more
Appendix
8
7
Table 3.4
A. The P_S input
ADC[7:0]
summarizes
0

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