L64780 LSI Logic Corporation, L64780 Datasheet - Page 80

• Manufacturer Part Number: L64780
• Description: Dvb-t Cofdm Demodulator Technical Manual 2/00
• Manufacturer: LSI Logic Corporation

4.4.9 Address Lines 0x0F, 0x10
4-28
TIM_OFFSET_MSB
TIM_CLK_INIT
Register Descriptions
0x0F
0x10
7
Start Pulse Phase Offset (MSB)
The start pulse is a signal with a periodicity of every
FFT-MODE + GUARD 9 MHz cycles (in steady state).
The TIM_OFFSET bits adjust the phase of this signal in
the periodic window. The initial condition for these bits is
0x00.
Timing Initial VCXO Offset
These two registers, TIM_CLK_INIT_LSB and
TIM_CLK_INIT_MSB, select the initial VCXO frequency
offset that is directed to the external VCXO.
When this register is read, its value represents the actual
VCXO offset (for example, the content of the integrator)
recovered by the system.
When this register is written, this value reinitializes the
Integrator value.
Two OBC accesses are required to update these registers;
thus, you should first stall the Integrator by setting
TIM_STALL to 1, then update the values. The process can
be unfrozen by clearing TIM_STALL back to 0.
The initial condition for these bits is 0x00 (both registers
set to 0x00).
TIM_CLK_INIT_MSB
TIM_CLK_INIT_LSB
R/W [5:0]
R/W [7:0]
0