USB97C100 Standard Microsystems Corporation, USB97C100 Datasheet - Page 22
USB97C100
Manufacturer Part Number
USB97C100
Description
USB97C100 Multi-endpoint Usb Peripheral Controller(not Recommended For Designs)
Manufacturer
Standard Microsystems Corporation
Datasheet
1.USB97C100.pdf
(64 pages)
- Current page: 22 of 64
- Download datasheet (441Kb)
Notes:
SMSC DS – USB97C100
In Counter mode, the 8051 must sample T[1:0] as a '1' in one instruction cycle, and then '0' in the next. So for
12MHz, the SOF Pulse must be active for at least 1us.
Missing SOF packets can be reconstructed by using the Timer mode to count the number of 8051 instruction
cycles since the last valid Frame was received.
A GPIO can be used to output nSOF pulses. This can be done by configuring a GPIO as an output and writing
to the GPIO out register to generate low pulses each time a SOF packet is received.
[7:4]
BIT
3
2
1
0
(0x7F1B- RESET=0x00)
GPIO0/RXD
GPIO1/TXD
UTIL_CONFIG
GPIO3/T1
GPIO2/T0
Reserved
NAME
Table 26 - Utility Configuration Register
R/W
R/W
R/W
R/W
R/W
R
Reserved
P3.5 Timer 1 input trigger source
0 = GPIO3
1 = SOF FRAME write strobe
P3.4 Timer 0 input trigger source
0 = GPIO2
1 = SOF FRAME write strobe
GPIO1/TXD Output Select Mux
0 = GPIO1
1 = P3.1
P3.0 RXD/GPIO0 Input Select Mux
0 = RXD<=GPIO0
1 = RXD<='0'
Page 22
UTILITY CONFIGURATION REGISTER
DESCRIPTION
Rev. 01/03/2001
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