AD9927 Analog Devices, AD9927 Datasheet - Page 29

• Manufacturer Part Number: AD9927
• Description: 14-Bit CCD Signal Processor
• Manufacturer: Analog Devices

1
VPAT0
VPAT1
4
CREATE THE VERTICAL PATTERN GROUPS,
UP TO FOUR TOGGLE POSITIONS FOR EACH OUTPUT.
FIELD0
FIELD3
FIELD5
USE THE MODE REGISTERS TO CONTROL WHICH FIELDS
ARE USED, AND IN WHAT ORDER (MAXIMUM OF SEVEN
FIELDS MAY BE COMBINED IN ANY ORDER).
XV23
XV24
XV23
XV24
XV3
XV1
XV2
XV1
XV2
XV3
FIELD4
FIELD1
FIELD1
FIELD2
FIELD4
Figure 34. Summary of Vertical Timing Generation
FIELD2
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(VPAT1, N REP)
V-SEQUENCE 0
V-SEQUENCE 1
V-SEQUENCE 2
(VPAT0, 1 REP)
(VPAT1, 2 REP)
FIELD 0
3
2
BUILD EACH FIELD BY DIVIDING INTO DIFFERENT REGIONS
AND ASSIGNING A DIFFERENT V-SEQUENCE TO EACH
(MAXIMUM OF NINE REGIONS IN EACH FIELD).
FIELD1
BUILD THE V-SEQUENCES BY ADDING START POLARITY,
LINE START POSITION, NUMBER OF REPEATS, ALTERNATION,
GROUP A/B/C/D INFORMATION, AND HBLK/CLPOB PULSES.
FIELD2
XV23
XV24
XV23
XV24
XV23
XV24
REGION 0: USE V-SEQUENCE 2
REGION 1: USE V-SEQUENCE 0
REGION 2: USE V-SEQUENCE 3
REGION 3: USE V-SEQUENCE 0
REGION 4: USE V-SEQUENCE 2
XV1
XV2
XV3
XV1
XV2
XV3
XV1
XV2
XV3
REGION 0: USE V-SEQUENCE 3
REGION 1: USE V-SEQUENCE 2
REGION 2: USE V-SEQUENCE 1
REGION 0: USE V-SEQUENCE 3
REGION 1: USE V-SEQUENCE 2
REGION 2: USE V-SEQUENCE 1
AD9927