MAX104 Maxim, MAX104 Datasheet - Page 12

• Manufacturer Part Number: MAX104
• Description: 5V / 1Gsps / 8-Bit ADC with On-Chip 2.2GHz Track/Hold Amplifier
• Manufacturer: Maxim

±5V, 1Gsps, 8-Bit ADC with
On-Chip 2.2GHz Track/Hold Amplifier
Figure 1. Simplified Functional Diagram
The MAX104 is an 8-bit, 1Gsps flash analog-to-digital
converter (ADC) with on-chip track/hold (T/H) amplifier
and differential PECL-compatible outputs. The ADC
(Figure 1) employs a fully differential 8-bit quantizer
and a unique encoding scheme to limit metastable
states to typically one error per 10
no error exceeding 1LSB max.
An integrated 8:16 output demultiplexer simplifies inter-
facing to the part by reducing the output data rate to
one-half the sampling clock rate. This demultiplexer
has internal reset capability that allows multiple
12
_______________Detailed Description
CLKCOM
VOSADJ
RSTIN+
RSTIN-
______________________________________________________________________________________
CLK+
CLK-
VIN+
VIN-
50
50
50
50
GNDI
GNDI
REFERENCE
BANDGAP
T/H
CLOCK
DRIVER
RESET INPUT
DUAL LATCH
BIAS CURRENTS
T/H AMPLIFIER
OUT
+2.5V
REF
GNDR
16
REF
IN
clock cycles, with
ADC
CLOCK
DRIVER
REFERENCE
AMPLIFIER
PIPELINE
RESET
LOGIC
CLOCK
DRIVER
FLASH ADC
8-BIT
DELAYED
RESET
MAX104
MAX104s to be time-interleaved to achieve higher
effective sampling rates.
When clocked at 1Gsps, the MAX104 provides a typi-
cal effective number of bits (ENOB) of >7.5 bits at an
analog input frequency of 500MHz. The analog input of
the MAX104 is designed for differential or single-ended
use with a ±250mV full-scale input range. In addition,
this ADC features an on-chip +2.5V precision bandgap
reference. If desired, an external reference can also be
used.
DEMUXEN DIVSELECT
GENERATOR
DEMUX
CLOCK
16
2
DEMUX
CLOCK
DRIVER
RESET OUTPUT
READY CLOCK
OVERRANGE
DATA PORT
DATA PORT
AUXILIARY
PRIMARY
DEMUX
DATA
BIT
16
16
2
2
2
PECL OUTPUTS
DIFFERENTIAL
OR
A0–A7
P0–P7
DREADY
RSTOUT