CRD4412 Cirrus Logic, Inc., CRD4412 Datasheet - Page 19

• Manufacturer Part Number: CRD4412
• Description: 60 W Quad Half-bridge Digital Amplifier Power Stage
• Manufacturer: Cirrus Logic, Inc.

DS690PP1
5. RESET AND POWER-UP
5.1
5.2
5.3
Reliable power-up can be accomplished by keeping the device in reset until the power supplies, clocks, and
configuration pins are stable. It is also recommended that the RSTx/y pin be activated if the voltage supplies
drop below the recommended operating condition to prevent power-glitch- related issues.
When RSTx/y is low, the corresponding channels of the CS44130 enter a low-power mode and all internal
states are reset and the outputs are set to HI-Z. When RSTx/y is high, the desired mode settings will be
loaded and the outputs will begin normal operation.
PWM Popguard Transient Control
Recommended Power-Up Sequence
Recommended Power-Down Sequence
The CS44130 uses Popguard
and power-down for half-bridge configurations. This technique reduces the audio transients commonly
produced by half-bridge, single-supply amplifiers when implemented with external DC-blocking capacitors
connected in series with the audio outputs.
When the device is configured for ramping (RAMP set high) and RSTx/y is set high and the inputs are
pulsed, the OUTx output will ramp-up to the bias point (VP/2). This gradual voltage ramping allows time
for the external DC-blocking capacitor to charge to the quiescent voltage, minimizing the power-up tran-
sient. The OUTx output will not begin normal operation until the ramp has reached the bias point. The INx
input must begin switching before the ramp cycle begins.
When the device is configured for ramping (RAMP set high) and RSTx/y is set low, the OUTx output will
begin to slowly ramp down from the bias point to PGND, allowing the DC-blocking capacitor to discharge.
It is not necessary to complete a ramp up/down sequence before ramping up/down again. PWM Popguard
should only be used in Half Bridge configurations.
1. Turn on the system power.
2. Hold RSTx/y low until the power supply and system clocks are stable. In this state, all associated
3. Start the PWM modulator output.
4. Once the PWM modulator output is valid, release RSTx/y high. If the CS44130 is configured for
1. Set RSTx/y low. If the CS44130 is configured for ramping, the outputs will ramp down to PGND and
2. Power-down the remainder of the system.
3. Turn off the system power.
outputs are HI-Z.
ramping, the outputs will ramp to the bias point and then begin switching normally. If the CS44130 is
not configured for ramping, the outputs will begin switching after approximately 35 cycles of the PWM
input signal.
then become HI-Z. If the CS44130 is not configured for ramping, the outputs will immediately become
HI-Z.
®
technology to minimize the effects of output transients during power-up
CS44130
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