T8536B ETC-unknow, T8536B Datasheet - Page 34
T8536B
Manufacturer Part Number
T8536B
Description
T8535b/t8536b Quad Programmable Codec
Manufacturer
ETC-unknow
Datasheet
1.T8536B.pdf
(50 pages)
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T8535B/T8536B Quad Programmable Codec
Timing Characteristics
Control Interface Timing
Serial Control Port Timing
Table 17. Serial Control Port Timing (See Figures 22 and 23.)
* The t
34
t
t
t
t
Symbol
t
t
CSBSETUP
SDBSETUP
t
t
CSBHOLD
SDBHOLD
CSSETUP
SDSETUP
t
CSHOLD
SDHOLD
t
SXBDLY
f
t
SXDLY
t
t
t
t
RISE
DCLK
RISE
FALL
FALL
SDZ
SXBDLY
,
delay is from either DCLK or CS, whichever transition is later, for the first bit of the byte.
Clock Frequency (all commands)
Chip Select Setup Time, Normal Mode
Chip Select Hold Time, Normal Mode
Output Data Delay, Normal Mode
Input Data Hold Time, Normal Mode
Input Data Setup Time, Normal Mode
Output Data, High Impedance
Clock Edge Rise Time
Clock Edge Fall Time
Line Driver Rise/Fall Time (DO output)
Chip Select Hold Time, Byte-by-Byte Mode
Output Data Delay, Byte-by-Byte Mode
Chip Select Setup Time, Byte-by-Byte Mode
Data Hold Time, Byte-by-Byte Mode
Data Setup Time, Byte-by-Byte Mode
Parameter
D
D
D
D
D
D
D
D
D
D
D
D
D
Test Conditions
CLK
C
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
LOAD
I
L
= 4.096 MHz*
= 4.096 MHz
= 4.096 MHz
= 4.096 MHz
= 4.096 MHz
= 4.096 MHz
= 4.096 MHz
= 4.096 MHz
= 4.096 MHz
= 4.096 MHz
= 4.096 MHz
= 4.096 MHz
= 4.096 MHz
= 15 mA,
= 100 pF
—
Min
100
—
—
—
—
—
—
7
4
4
7
4
7
4
7
Typ
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
September 2001
Agere Systems Inc.
4096
Max
—
—
—
—
12
12
30
—
—
—
—
—
9
9
Unit
kHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns