HFC-S Cologne Chip AG, HFC-S Datasheet - Page 48

• Manufacturer Part Number: HFC-S
• Description: Isdn S/t HDLC Basic Rate Controller
• Manufacturer: Cologne Chip AG

8
8.1
Table 5: Activation/deactivation layer 1 for finite state matrix for NT
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Notes
Note 1: Timer 1 (T1) is not implemented in the HFC-S and must be implemented in software.
Note 2: Timer 2 (T2) prevents unintentional reactivation. Its value is 32ms (256 x 125µs). This
March 1997
Event
Activate request
Deactivate request
Expiry T2
(Note 2)
Receiving INFO 0
Receiving INFO 1
Receiving INFO 3
Lost framing
State matrices for NT and TE
S/T interface activation/deactivation layer 1 for finite state matrix for NT
No state change
Impossible by the definition of peer-to-peer physical layer procedures or system internal
reasons
Impossible by the definition of the physical layer service
implies that a TE has to recognize INFO 0 and to react on it within this time.
State number
State name
INFO
sent
(Note 1)
INFO 0
Reset
G0
G2
Deactive
(Note 1)
(Note 1)
INFO 0
G1
G2
G2
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/
/
Start timer T2
activation
Pending
(Note 1)
INFO 2
G2
G4
G3
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/
Start timer T2
INFO 4
Active
G3
G4
G2
G2
/
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deactivation
Pending
(Note 1)
INFO 0
G4
G2
G1
G1
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HFC-S