FT221XQ-R International Semiconductor Technologies, FT221XQ-R Datasheet - Page 12

• Manufacturer Part Number: FT221XQ-R
• Description: Specifications: Applications: * ; Interface: * ; Voltage - Supply: 3.3 V ~ 5 V ; Package / Case: 20-VFQFN Exposed Pad ; Packaging: Digi-Reel
• Manufacturer: International Semiconductor Technologies

FT221X USB 8-BIT SPI/FT1248 IC Datasheet
Version 1.2
Document No.: FT_000630 Clearance No.: FTDI# 263
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Function Description
The FT221X is a USB to FTDI Proprietary FT1248 interface device which simplifies USB implementations
and reduces external component count by fully integrating into the device an MTP memory, and an
integrated clock circuit which requires no external crystal. It has been designed to operate efficiently
with USB host controllers by using as little bandwidth as possible when compared to the total USB
bandwidth available.
4.1 Key Features
Functional Integration. Fully integrated MTP memory, USB termination resistors, clock generation,
AVCC filtering, Power-On-Reset and LDO regulator.
Configurable CBUS I/O Pin Options. The fully integrated MTP memory allows configuration of the
Control Bus (CBUS) functionality and drive strength selection. There is 1 configurable CBUS I/O pin.
These configurable options are defined in section 3.3
The CBUS line can be configured with any one of these output options by setting bits in the internal MTP
memory. The device is shipped with the most commonly used pin definitions pre-programmed - see
Section 9 for details.
Asynchronous Bit Bang Mode with RD# and WR# Strobes. The FT221X supports FTDI’s previous
chip generation bit-bang mode. In bit-bang mode, the eight data lines can be switched from the regular
interface mode to an 8-bit general purpose I/O port. Data packets can be sent to the device and they will
be sequentially sent to the interface at a rate controlled by an internal timer (equivalent to the baud rate
pre-scalar).
Synchronous Bit Bang Mode. The FT221X supports synchronous bit bang mode. This mode differs from
asynchronous bit bang mode in that the interface pins are only read when the device is written to. This
makes it easier for the controlling program to measure the response to an output stimulus as the data
returned is synchronous to the output data. An application note, AN232R-01, available from FTDI website
(www.ftdichip.com) describes this feature.
Source Power and Power Consumption. The FT221X is capable of operating at a voltage supply
between +3.3V and +5.25V with a nominal operational mode current of 8mA and a nominal USB suspend
mode current of 125µA. This allows greater margin for peripheral designs to meet the USB suspend mode
current limit of 2.5mA. An integrated level converter within the device allows the FT221X to interface to
logic running at +1.8V to +3.3V (5V tolerant).
4.2 Functional Block Descriptions
The following paragraphs detail each function within the FT221X. Please refer to the block diagram shown
in Figure 2.1
Internal MTP Memory. The internal MTP memory in the FT221X is used to store USB Vendor ID (VID),
Product ID (PID), device serial number, product description string and various other USB configuration
descriptors. The internal MTP memory is also used to configure the CBUS pin functions. The FT221X is
supplied with the internal MTP memory pre-programmed as described in Section 9. A user area of the
internal MTP memory is available to system designers to allow storing additional data from the user
application over USB. The internal MTP memory descriptors can be programmed in circuit, over USB
without any additional voltage requirement. The descriptors can be programmed using the FTDI utility
software called FT_PROG, which can be downloaded from FTDI Utilities on the FTDI website
(www.ftdichip.com). In addition to programming over USB the MTP memory may be accessed via the
FT1248 interface.
+1.8V LDO Regulator. The +1.8V LDO regulator generates the +1.8V reference voltage for driving the
internal core of the IC.
+3.3V LDO Regulator. The +3.3V LDO regulator generates the +3.3V reference voltage for driving the
USB transceiver cell output buffers. It requires an external decoupling capacitor to be attached to the
3V3OUT regulator output pin. It also provides +3.3V power to the 1.5kΩ internal pull up resistor on
USBDP. The main function of the LDO is to power the USB Transceiver and the Reset Generator Cells
rather than to power external logic. However, it can be used to supply external circuitry requiring a
+3.3V nominal supply with a maximum current of 50mA.
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