WM8581 Wolfson Microelectronics Ltd., WM8581 Datasheet - Page 78

• Manufacturer Part Number: WM8581
• Description: Multichannel Codec with S/pdif Transceiver
• Manufacturer: Wolfson Microelectronics Ltd.

WM8581
REGISTER MAP
The complete register map is shown below. The detailed description can be found in the relevant text of the device description. The
WM8581 can be configured using the Control Interface. All unused bits should be set to ‘0’.
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REGISTER
R10
R11
R12
R13
R14
R15
R16
R17
R18
R19
R20
R21
R22
R23
R24
R25
R26
R27
R28
R29
R30
R31
R32
R33
R34
R35
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
NAME
DAC CONTROL 1
DAC CONTROL 2
DAC CONTROL 3
DAC CONTROL 4
DAC CONTROL 5
ADC CONTROL 1
DIGITAL ATTENUTATION
DIGITAL ATTENUTATION
DIGITAL ATTENUTATION
DIGITAL ATTENUTATION
DIGITAL ATTENUTATION
DIGITAL ATTENUTATION
DIGITAL ATTENUTATION
DIGITAL ATTENUTATION
PLLA 3/DEVREV
PLLA 1/DEVID1
PLLA 2/DEVID2
SPDTXCHAN 0
SPDTXCHAN 1
SPDTXCHAN 2
SPDTXCHAN 3
SPDTXCHAN 4
SPDTXCHAN 5
MASTER DIGITAL
ATTENUTATION
CLKSEL
PLLA 4
PLLB 1
PLLB 2
PLLB 3
PLLB 4
PAIF 1
PAIF 2
SAIF 1
PAIF 3
PAIF 4
SAIF 2
DACL 1
DACR 1
DACL 2
DACR 2
DACL 3
DACR 3
DACR 4
DACR 4
ADDRESS
0A
0B
0C
0D
0E
1A
1B
1C
1D
1E
00
01
02
03
04
05
06
07
08
09
0F
10
11
12
13
14
15
16
17
18
19
1F
20
21
22
23
B8
VMIDSEL
RX2 DAC_M ODE
UPDATE
UPDATE
UPDATE
UPDATE
UPDATE
UPDATE
UPDATE
UPDATE
UPDATE
CLKOUTSRC[1:0]
PAIFTX_SRC[1:0]
SAIFTX_SRC[1:0]
DAC_SRC[1:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
B7
MPDENB
SAIFMS_CLKSEL[1:0]
PAIFRXMS_CLKSEL[1:0]
IZD
CHSTMODE[1:0]
0
0
0
0
0
0
CHNUM2[1:0]
DAC4SEL[1:0]
ADCRATE[2:0]
B6
DACOSR
DACATC
SAIF_EN
TXVAL_
CLKSEL
_MAN
SF1
ORGSAMP[3:0]
MCLKOUTSRC[1:0]
PLLA_N[3:0]
PLLB_N[3:0]
0
0
0
0
0
DZFM[2:0]
B5
PAIFTXMS
TXVAL_
SAIFMS
SAIFBCP
DZCEN
PAIFRXMS
PAIFRXBCP
PAIFTXBCP
TX_CLKSEL[1:0]
SF0
CHNUM1[1:0]
DAC3SEL[1:0]
CLKACU[1:0]
0
0
PLLA_K[17:9]
PLLB_K[17:9]
PLLA_K[8:0]
PLLB_K[8:0]
DEEMPH[2:0]
ADCHPD ADCOSR AMUTEALL AMUTER
DEEMPALL
MUTEALL
TXVAL_
B4
OVWR
PAIFRXLRP
PAIFTXLRP
SAIFLRP
CATCODE[7:0]
SAIF_BCLKSEL[1:0]
FREQMODE_A[1:0]
FREQMODE_B[1:0]
MASTDA[7:0]
PAIFRX_BCLKSEL[1:0]
PHASE[7:0]
PAIFTX_BCLKSEL[1:0]
RDA1[7:0]
RDA2[7:0]
RDA3[7:0]
RDA4[7:0]
LDA1[7:0]
LDA2[7:0]
LDA3[7:0]
LDA4[7:0]
B3
THROUGH
ADC_CLKSEL[1:0]
REAL_
PAIFRXWL[1:0]
PAIFTXWL[1:0]
DAC2SEL[1:0]
SAIFWL[1:0]
TXWL[2:0]
B2
OVWCHAN
CPY_N
PLLA_K[21:18]
PLLB_K[21:18]
SRCNUM[3:0]
1
1
DMUTE[3:0]
DEEMP[3:0]
FREQ[3:0]
PAIFRX_RATE[2:0]
PAIFTX_RATE[2:0]
PL[3:0]
SAIF_RATE[2:0]
POSTSCALE_A PRESCALE_A
POSTSCALE_B PRESCALE_B
B1
AUDIO_N CON/PRO
DAC_CLKSEL[1:0]
PAIFRXFMT[1:0]
PAIFTXFMT[1:0]
DAC1SEL[1:0]
SAIFFMT[1:0]
TXSRC[1:0]
PD Rev 4.0 April 2007
B0
AMUTEL
MAXWL
Production Data
DEFAULT
100100001
101111110
001111101
000010100
100100001
101111110
001111101
110010100
000000010
000000010
011000010
110001010
010001010
000001010
011100100
000001001
000000000
011111111
000000000
011111111
011111111
011111111
011111111
011111111
011111111
011111111
011111111
011111111
101000000
000000010
000000000
000000000
000000000
000110001
000001011
000010000
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