ADSP-2187L Analog Devices, ADSP-2187L Datasheet - Page 13

• Manufacturer Part Number: ADSP-2187L
• Description: DSP Microcomputer
• Manufacturer: Analog Devices

INSTRUCTION SET DESCRIPTION
The ADSP-2187L assembly language instruction set has an
algebraic syntax that was designed for ease of coding and read-
ability. The assembly language, which takes full advantage of
the processor’s unique architecture, offers the following benefits:
• The algebraic syntax eliminates the need to remember cryptic
• Every instruction assembles into a single, 24-bit word that can
• The syntax is a superset ADSP-2100 Family assembly lan-
• Sixteen condition codes are available. For conditional jump,
• Multifunction instructions allow parallel execution of an
DESIGNING AN EZ-ICE-COMPATIBLE SYSTEM
The ADSP-2187L has on-chip emulation support and an ICE-
Port, a special set of pins that interface to the EZ-ICE. These
features allow in-circuit emulation without replacing the target
system processor by using only a 14-pin connection from the
target system to the EZ-ICE. Target systems must have a 14-pin
connector to accept the EZ-ICE’s in-circuit probe, a 14-pin plug.
See the ADSP-2100 Family EZ-Tools data sheet for complete in-
formation on ICE products.
Issuing the chip reset command during emulation causes the
DSP to perform a full chip reset, including a reset of its memory
mode. Therefore, it is vital that the mode pins are set correctly
PRIOR to issuing a chip reset command from the emulator user
interface. If you are using a passive method of maintaining
mode information (as discussed in Setting Memory Modes)
then it does not matter that the mode information is latched by
an emulator reset. However, if you are using the RESET pin as
a method of setting the value of the mode pins, then you have to
take into consideration the effects of an emulator reset.
REV. 0
assembler mnemonics. For example, a typical arithmetic add
instruction, such as AR = AX0 + AY0, resembles a simple
equation.
execute in a single instruction cycle.
guage and is completely source and object code compatible
with other family members. Programs may need to be relo-
cated to utilize on-chip memory and conform to the ADSP-
2187L’s interrupt vector and reset vector map.
call, return or arithmetic instructions, the condition can be
checked and the operation executed in the same instruction
cycle.
arithmetic instruction with up to two fetches or one write to
processor memory space during a single instruction cycle.
–13–
One method of ensuring that the values located on the mode
pins are those desired is to construct a circuit like the one shown
in Figure 10. This circuit forces the value located on the Mode
A pin to logic high; regardless if it latched via the RESET or
ERESET pin.
The ICE-Port interface consists of the following ADSP-2187L
pins:
EBR
EMS
ELIN
These ADSP-2187L pins must be connected only to the EZ-ICE
connector in the target system. These pins have no function ex-
cept during emulation, and do not require pull-up or pull-down
resistors. The traces for these signals between the ADSP-2187L
and the connector must be kept as short as possible, no longer
than three inches.
The following pins are also used by the EZ-ICE:
BR
RESET
The EZ-ICE uses the EE (emulator enable) signal to take con-
trol of the ADSP-2187L in the target system. This causes the
processor to use its ERESET, EBR and EBG pins instead of the
RESET, BR and BG pins. The BG output is three-stated. These
signals do not need to be jumper-isolated in your system.
The EZ-ICE connects to your target system via a ribbon cable
and a 14-pin female plug. The ribbon cable is 10 inches in
length with one end fixed to the EZ-ICE. The female plug is
plugged onto the 14-pin connector (a pin strip header) on the
target board.
EBG
EINT
ELOUT
Figure 10. Mode A Pin/EZ-ICE Circuit
BG
GND
ERESET
ECLK
EE
1k
PROGRAMMABLE I/O
ADSP-2187L
ERESET
RESET
MODE A/PFO
ADSP-2187L