ADSP-2187L Analog Devices, ADSP-2187L Datasheet - Page 20
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ADSP-2187L
Manufacturer Part Number
ADSP-2187L
Description
DSP Microcomputer
Manufacturer
Analog Devices
Datasheet
1.ADSP-2187L.pdf
(32 pages)
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ADSP-2187L
Parameter
Interrupts and Flag
Timing Requirements:
t
t
Switching Characteristics:
t
t
NOTES
1
2
3
4
5
IFS
IFH
FOH
FOD
If IRQx and FI inputs meet t
the following cycle. (Refer to Interrupt Controller Operation in the Program Control chapter of the User’s Manual for further information on interrupt servicing.)
Edge-sensitive interrupts require pulsewidths greater than 10 ns; level-sensitive interrupts must be held low until serviced.
IRQx = IRQ0, IRQ1, IRQ2, IRQL0, IRQL1, IRQE.
PFx = PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7.
Flag outputs = PFx, FL0, FL1, FL2, Flag_out4.
IRQx, FI, or PFx Setup before CLKOUT Low
IRQx, FI, or PFx Hold after CLKOUT High
Flag Output Hold after CLKOUT Low
Flag Output Delay from CLKOUT Low
IFS
and t
IFH
setup/hold requirements, they will be recognized during the current clock cycle; otherwise the signals will be recognized on
OUTPUTS
CLKOUT
FLAG
IRQx
PFx
FI
Figure 21. Interrupts and Flags
5
5
t
t
FOH
FOD
1, 2, 3, 4
–20–
1, 2, 3, 4
t
IFH
Min
0.25t
0.25t
0.5t
t
IFS
CK
CK
CK
– 7
+ 15
Max
0.15t
CK
+ 6
Unit
ns
ns
ns
ns
REV. 0