HY29F800A Hynix Semiconductor, HY29F800A Datasheet - Page 19

• Manufacturer Part Number: HY29F800A
• Description: Flash Memory
• Manufacturer: Hynix Semiconductor

HARDWARE DATA PROTECTION
The HY29F800A provides several methods of pro-
tection to prevent accidental erasure or program-
ming which might otherwise be caused by spuri-
ous system level signals during V
power-down transitions, or from system noise.
These methods are described in the sections that
follow.
Command Sequences
Commands that may alter array data require a
sequence of cycles as described in Table 5. This
provides data protection against inadvertent writes.
Low V
To protect data during V
down, the device does not accept write cycles
when V
command register and all internal program/erase
circuits are disabled, and the device resets to the
Read mode. Writes are ignored until V
than V
signals to the control pins to prevent unintentional
writes when V
Rev. 1.1/Feb 02
CC
LKO
CC
Write Inhibit
is less than V
. The system must provide the proper
CC
is greater than V
LKO
CC
(typically 3.7 volts). The
power-up and power-
CC
LKO
power-up and
.
CC
is greater
Write Pulse “Glitch” Protection
Noise pulses of less than 5 ns (typical) on OE#,
CE# or WE# do not initiate a write cycle.
Logical Inhibit
Write cycles are inhibited by asserting any one of
the following conditions: OE# = V
WE# = V
must be a logical zero while OE# is a logical one.
Power-Up Write Inhibit
If WE# = CE# = V
up, the device does not accept commands on the
rising edge of WE#. The internal state machine is
automatically reset to the Read mode on power-
up.
Sector Protection
Additional data protection is provided by the
HY29F800A’s sector protect feature, described
previously, which can be used to protect sensitive
areas of the Flash array from accidental or unau-
thorized attempts to alter the data.
IH
. To initiate a write cycle, CE# and WE#
IL
and OE# = V
IL
IH
, CE# = V
HY29F800A
during power
IH
, or
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