MT55L128L32F1 Micron Semiconductor Products, Inc., MT55L128L32F1 Datasheet - Page 23

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MT55L128L32F1

Manufacturer Part Number
MT55L128L32F1
Description
4Mb ZBT SRAM, 3.3V Vdd, 3.3V or 2.5V I/O, Flow-Through,
Manufacturer
Micron Semiconductor Products, Inc.
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MT55L128L32F1F-12 IT
Manufacturer:
MICRON/美光
Quantity:
20 000
NOP, STALL, AND DESELECT TIMING PARAMETERS
NOTE: 1. The IGNORE CLOCK EDGE or STALL cycle (clock 3) illustrates CKE# being used to create a “pause.” A WRITE is not
4Mb: 256K x 18, 128K x 32/36 Flow-Through ZBT SRAM
MT55L256L18F1_F.p65 – Rev. F, Pub. 1/03 EN
COMMAND
SYM
t
t
KHQX
KHQZ
ADDRESS
ADV/LD#
BWx#
R/W#
CKE#
2. For this waveform, ZZ and OE# are tied LOW.
3. CE# represents three signals. When CE# = 0, it represents CE# = 0, CE2# = 0, CE2 = 1.
4. Data coherency is provided for all possible operations. If a READ is initiated, the most current data is used. The most
CLK
CE#
DQ
MIN
3.0
performed during this cycle.
recent data may be from the input data register.
-10
MAX
5.0
WRITE
D(A1)
A1
1
MIN
3.0
D(A1)
-11
Q(A2)
READ
A2
2
MAX
5.0
NOP, STALL, AND DESELECT CYCLES
MIN
3.0
STALL
3
-12
Q(A2)
MAX
5.0
READ
Q(A3)
A3
4
UNITS
ns
ns
23
WRITE
D(A4)
A4
Q(A3)
5
4Mb: 256K x 18, 128K x 32/36
STALL
6
FLOW-THROUGH ZBT SRAM
Micron Technology, Inc., reserves the right to change products or specifications without notice.
D(A4)
NOP
7
DON’T CARE
READ
Q(A5)
A5
8
t KHQX
DESELECT
Q(A5)
9
©2003, Micron Technology, Inc.
t KHQZ
UNDEFINED
CONTINUE
DESELECT
10

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