MT9315 Zarlink Semiconductor, MT9315 Datasheet - Page 20

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MT9315

Manufacturer Part Number
MT9315
Description
Acoustic Echo CANceller
Manufacturer
Zarlink Semiconductor
Datasheet
Advance Information
Reset 00h
Reset 00h
Reset 00h
Power Up
Power Up
Power Up
16h Read
17h Read
18h Read
Address:
Address:
Address:
RIPD
RIPD
RIPD
RIPD
RIPD
RIPD
REPD
REPD
REPD
REPD
REPD
REPD
REPD
REPD
RIPD
RIPD
RIPD
RIPD
RIPD
RIPD
RIPD
RIPD
RIPD
RIPD
10
11
12
13
14
15
0
1
2
3
4
5
6
7
8
9
0
1
2
3
4
5
6
7
These peak detector registers allow the user to monitor the receive in signal (Rin) peak level at reference point R1 (see
Figure #1). The information is in 16-bit 2’s complement linear coded format presented in two 8 bit registers. The high byte
is in Register 2 and the low byte is in Register 1.
See Above Description
These peak detector registers allow the user to monitor the error signal peak level at reference point R2 (see Figure #1).
The information is in 16-bit 2’s complement linear coded format presented in two 8 bit registers. The high byte is in Register
2 and the low byte is in Register 1.
MSB
MSB
MSB
7
7
7
RIPD
REPD
RIPD
15
7
7
6
6
6
Receive (Rin) ERROR Peak Detect Register
RIPD
REPD
RIPD
Receive (Rin) Peak Detect Register
Receive (Rin) Peak Detect Register
14
6
6
5
5
5
REPD
RIPD
RIPD
13
5
5
4
4
4
REPD
RIPD
RIPD
12
4
4
3
3
3
REPD
RIPD
RIPD
3
11
3
2
2
2
1 (RIPD1)
2 (RIPD2)
REPD
RIPD
RIPD
1 (REPD1)
10
2
2
1
1
1
RIPD
REPD
RIPD
9
1
1
0
0
0
MT9315
REPD
RIPD
RIPD
0
8
0
LSB
LSB
LSB
19

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