MT8920BC Zarlink Semiconductor, MT8920BC Datasheet - Page 4

• Manufacturer Part Number: MT8920BC
• Description: MT8920 - 32 Channels TDM (ST-BUS) to Parallel Bus Access Circuit
• Manufacturer: Zarlink Semiconductor

MT8920B
4
Functional Description
The STPA (ST-BUS Parallel Access) device provides
a simple interface between Zarlink’s ST-BUS and
parallel system environments.
synchronous,
bussing scheme with data streams operating at 2048
kbit/s. The ST-BUS is the primary means of access
for voice, data and control information to Zarlink’s
family of digital telecommunications components,
including North American and European digital trunk
interfaces, ISDN U and S digital line interfaces, filter
codecs, rate adapters, etc.
several modes of operation optimized according to
the type of information being handled.
For interfacing parallel data and control information
to the ST-BUS, such as signalling and link control for
digital trunks, the STPA provides a µP access mode
(Mode 1), and looks like a 68000 type peripheral. In
this mode, the device provides powerful interrupt
features, useful in monitoring digital trunk or line
status (i.e., synchronization, alarms, etc.) or for
setting up message communication links between
microprocessors.
To interface high speed data or multi-channel voice/
data to the ST-BUS for switching or transmission, the
STPA has a high speed synchronous access mode
(Mode 2) and acts like a fast RAM. For voice storage
and forward, bulk data transfer, data buffering and
other
controllerless mode (Mode 3) in which it provides
address and control signals to the parallel bus This
is useful for performing direct transfers to the
ST-BUS from external devices such as a RAM buffer.
The STPA is a two port device as shown in the
functional block diagram in Figure 1. The parallel
port provides direct access to three dual port RAM’s,
two transmit and one receive. The address, data
similar
IACK
STi0
R/W
VSS
C4i
F0i
CS
DS
A0
A1
A2
A3
A4
A5
µP Peripheral Mode #1
time
applications,
10
11
12
13
14
1
2
3
4
5
6
7
8
9
division,
28
27
26
25
24
23
22
21
20
19
18
17
16
15
the
The STPA provides
VDD
MMS
DTACK
IRQ
STo1
STo0
D7
D6
D5
D4
D3
D2
D1
D0
multiplexed
The ST-BUS is a
Figure 3 - Modes 1, 2, 3 Pin Connections
STPA
MS1
STi0
R/W
VSS
C4i
OE
has
F0i
CS
A0
A1
A2
A3
A4
A5
serial
Fast RAM
10
11
12
13
14
1
2
3
4
5
6
7
8
9
a
and control busses are used to communicate
between the RAM‘s and a parallel environment.
Two
serial-to-parallel converter interface the dual port
RAM’s to the ST-BUS port of the STPA. This port
consists of two serial output streams and one serial
input stream operating at 2048 kbit/s.
configuration of two outputs and one input was
designed to allow a single STPA to form a complete
control interface to Zarlink’s digital trunk interfaces
(MT8976, MT8978 and MT8979) which have two
serial input and one serial output control streams.
ST-BUS clocking circuitry, address generator and
various control and interrupt registers complete the
STPA’s functionality.
Modes of Operation
The three basic modes of operation, µP Peripheral
Mode (Mode 1), Fast RAM Mode (Mode 2) and Bus
Controller Mode (Mode 3) are selected using two
external input pins. These inputs are MMS and MS1
and are decoded as shown in Table 1. Whenever
MMS=1 the device resides in Mode 1. In this mode,
MS1 pin is unavailable and is used for a different
function.
When MMS=0, Modes 2 or 3 are selected as
determined by input MS1.
selected and if MS1 =0, Mode 3 is selected.
Each of the modes of the STPA provides a different
pinout to ease interfacing requirements of different
parallel environments. These are shown in Figure 3
below.
interface signals consistent with a 68000-type µP
bus. Mode 2, Fast RAM Mode, uses signals typical
of standard RAM type interfaces. Mode 3 interface
signals are very similiar to Mode 2 signals except
that the address and control signals are supplied as
outputs by the STPA.
Mode #2
28
27
26
25
24
23
22
21
20
19
18
17
16
15
parallel-to-serial
VDD
MMS
BUSY
24/32
STo1
STo0
D7
D6
D5
D4
D3
D2
D1
D0
In µP Peripheral Mode the device uses
STCH
MS1
STi0
VSS
WE
C4i
OE
F0i
CS
A0
A1
A2
A3
A4
Bus Controller Mode #3
10
11
12
13
14
1
2
3
4
5
6
7
8
9
converters,
If MS1=1, Mode 2 is
28
27
26
25
24
23
22
21
20
19
18
17
16
15
Data Sheet
VDD
MMS
DCS
24/32
STo1
STo0
D7
D6
D5
D4
D3
D2
D1
D0
and
This
one