ADC1175CIMTC National Semiconductor, ADC1175CIMTC Datasheet - Page 14

• Manufacturer Part Number: ADC1175CIMTC
• Description: 8-Bit/ 20MHz/ 60mW A/D Converter
• Manufacturer: National Semiconductor

www.national.com
3.0 POWER SUPPLY CONSIDERATIONS
Many A/D converters draw sufficient transient current to cor-
rupt their own power supplies if not adequately bypassed. A
10µF tantalum or aluminum electrolytic capacitor should be
placed within an inch (2.5 centimeters) of the A/D power pins,
with a 0.1 µF ceramic chip capacitor placed as close as pos-
sible to the converter's power supply pins. Leadless chip
capacitors are preferred because they have low lead induc-
tance.
While a single voltage source should be used for the analog
and digital supplies of the ADC1175, these supply pins should
be well isolated from each other to prevent any digital noise
from being coupled to the analog power pins. A wideband
choke, such as the JW Miller FB20010-3B, is recommended
between the analog and digital supply lines, with a ceramic
capacitor close to the analog supply pin. Avoid inductive com-
ponents in the analog supply line.
The converter digital supply should not be the supply that is
used for other digital circuitry on the board. It should be the
same supply used for the A/D analog supply.
As is the case with all high speed converters, the ADC1175
should be assumed to have little a.c. power supply rejection,
especially when self-biasing is used by connecting V
V
No pin should ever have a voltage on it that is in excess of the
supply voltages or below ground, not even on a transient ba-
sis. This can be a problem upon application of power to a
circuit. Be sure that the supplies to circuits driving the CLK,
OE, analog input and reference pins do not come up any
faster than does the voltage at the ADC1175 power pins.
Pins 11 and 13 are both labeled DV
point for the digital core of the ADC, where pin 13 is used only
FIGURE 5. Driving the reference to force desired values requires driving with a low impedance source, provided by the
RTS
together.
transistors. Note that pins 16 and 22 are not connected.
DD
. Pin 11 is the supply
RT
and
14
to provide power to the ADC output drivers. As such, pin 11
may be connected to a voltage source that is less than the
+5V used for AV
age devices. Pin 11 should never exceed the pin 13 potential
by more than 0.5V.
4.0 THE ADC1175 CLOCK
Although the ADC1175 is tested and its performance is guar-
anteed with a 20MHz clock, it typically will function with clock
frequencies from 1MHz to 30MHz.
If continuous conversions are not required, power consump-
tion can be reduced somewhat by stopping the clock at a logic
low when the ADC1175 is not being used. This reduces the
current drain in the ADC1175's digital circuitry from a typical
value of 2.5mA to about 100µA.
Note that powering up the ADC1175 without the clock running
may not save power, as it will result in an increased current
flow (by as much as 170%) in the reference ladder. In some
cases, this may increase the ladder current above the speci-
fied limit. Toggling the clock twice at 1MHz or higher and
returning it to the low state will eliminate the excess ladder
current.
An alternative power-saving technique is to power up the
ADC1175 with the clock active, then halt the clock in the low
state after two or more clock cycles. Stopping the clock in the
high state is not recommended as a power-saving technique.
5.0 LAYOUT AND GROUNDING
Proper grounding and proper routing of all signals is essential
to ensure accurate conversion. Separate analog and digital
ground planes that are connected beneath the ADC1175 may
be used, but best EMI practices require a single ground plane.
However, it is important to keep analog signal lines away from
DD
and DV
DD
to ease interfacing to low volt-
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