PIC16C745/P Microchip Technology, PIC16C745/P Datasheet - Page 60

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PIC16C745/P

Manufacturer Part Number
PIC16C745/P
Description
8-Bit CMOS Microcontrollers with USB
Manufacturer
Microchip Technology
Datasheet
PIC16C745/765
10.5
The USB Control Registers, Buffer Descriptors and
Buffers are located in Bank 3.
10.5.1
The USB module is controlled by 7 registers, plus
those that control each endpoint and endpoint/direc-
tion buffer.
REGISTER 10-1: USB INTERRUPT FLAGS REGISTER (UIR: 190h)
DS41124A-page 60
bit7
bit 7-6: Unimplemented: Read as '0'.
bit 5:
bit 4:
bit 3:
bit 2:
bit 1:
bit 0:
Note 1: Bits can only be modified when UCTRL.SUSPND = 0.
U-0
USB Register Map
CONTROL AND STATUS REGISTERS
timer is reset by activity on the USB bus. Once a IDLE condition has been detected, the user may wish
to place the USB module in SUSPEND by setting the SUSPEND bit in the UCTRL register.
should immediately read the USTAT register to determine the Endpoint number and direction used for
this token. Clearing this bit causes the USTAT register to be cleared or the USTAT holding register to be
loaded into the STAT register if another token has been processed.
following detection of SLEEP. Users must enable the activity interrupt in the USB Interrupt Register
(UIE: 191h) prior to entering suspend.
MCU must then read the ERR_STAT register to determine the source of the error.
00h into the address register and enable endpoint 0. USB_RST is set once a USB reset has been
detected for 2.5 microseconds. It will not be asserted again until the USB reset condition has been
removed, and then reasserted.
STALL: A STALL handshake was sent by the SIE.
UIDLE: This bit is set if the USB has detected a constant idle on the USB bus signals for 3 ms. The idle
TOK_DNE: This bit is set when the current token being processed is complete. The microprocessor
ACTIVITY: Activity on the D+/D- lines will cause the SIE to set this bit. Typically this bit is unmasked
UERR: This bit is set when any of the error conditions within the ERR_STAT register has occurred. The
USB_RST: This bit is set when the USB has decoded a valid USB reset. This will inform the MCU to write
U-0
STALL
R/C-0
UIDLE TOK_DNE ACTIVITY
R/C-0
R/C-0
Advanced Information
R/C-0
10.5.1.1
The USB Interrupt Status Register (UIR) contains flag
bits for each of the interrupt sources within the USB.
Each of these bits are qualified with their respective
interrupt enable bits (see the Interrupt Enable Register
UIE). All bits of the register are logically OR’ed
together to form a single interrupt source for the micro-
processor interrupt found in PIR1 (USBIF). Once an
interrupt bit has been set, it must be cleared by writing
a 0.
UERR
R/C-0
USB Interrupt Register (UIR)
USB_RST
R/C-0
bit0
R = Readable bit
C = Clearable bit
U = Unimplemented bit,
-n = Value at POR reset
1999 Microchip Technology Inc.
read as ‘0’

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