M74HCT652B1R STMicroelectronics, M74HCT652B1R Datasheet

M74HCT652B1R

Manufacturer Part Number

M74HCT652B1R

Description

IC TRANSCVR 8BIT N-INV 24DIP

Manufacturer

STMicroelectronics

Series

74HCTr

Datasheet

1.M74HCT652RM13TR.pdf (15 pages)

Specifications of M74HCT652B1R

Logic Type

Transceiver, Non-Inverting

Number Of Elements

Number Of Bits Per Element

Current - Output High, Low

6mA, 6mA

Voltage - Supply

4.5 V ~ 5.5 V

Operating Temperature

-55°C ~ 125°C

Mounting Type

Through Hole

Package / Case

24-DIP (0.300", 7.62mm)

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

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DESCRIPTION

The 74HCT652 is an advanced high-speed

CMOS

This device consists of bus transceiver circuits,

D-type flip-flops, and control circuitry arranged for

multiplexed transmission of data directly from the

input bus or from the internal storage registers.

Enable GAB and GBA are provided to control the

transceiver functions. Select AB(SAB) and select

BA(SBA) control pins are provided to select

whether real-time or stored data is transferred. A

low input level selects real-time data, and a high

selects stored data.

Data on the A or B bus, or both, can be stored in

the internal D flip-flops by low-to-high transition at

the appropriate clock pins (CLOCK AB or CLOCK

PIN CONNECTION AND IEC LOGIC SYMBOLS

April 2003

MOS technology.

HIGH SPEED:

LOW POWER DISSIPATION:

COMPATIBLE WITH TTL OUTPUTS :

SYMMETRICAL OUTPUT IMPEDANCE:

BALANCED PROPAGATION DELAYS:

PIN AND FUNCTION COMPATIBLE WITH

74 SERIES 652

MAX

PLH

= 4 A(MAX.) at T

= 2V (MIN.) V

| = I

= 55 MHz (TYP.) at V

OCTAL

PHL

= 6mA (MIN)

BUS

= 0.8V (MAX)

=25°C

TRANSCEIVER

= 4.5V

OCTAL BUS TRANSCEIVER/REGISTER

AND

ORDER CODES

BA) regardless of the select or enable control pins.

When select AB and select BA are in the real time

transfer mode, it is also possible to store data

without using the internal D type flip-flops by

simultaneously enabling GAB and GBA. In this

configuration each output reinforces its input.

Thus, when all other data sources to the two sets

of bus lines are at high impedance, each set of

bus lines will remain at its last state.

All inputs are equipped with protection circuits

against static discharge and transient excess

voltage.

PACKAGE

TSSOP

SOP

DIP

WITH 3 STATE OUTPUTS

DIP

M74HCT652M1R M74HCT652RM13TR

M74HCT652B1R

TUBE

M74HCT652

SOP

M74HCT652TTR

T & R

TSSOP

1/15

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M74HCT652B1R Summary of contents

Page 1

... Thus, when all other data sources to the two sets of bus lines are at high impedance, each set of bus lines will remain at its last state. All inputs are equipped with protection circuits against static discharge and transient excess voltage. M74HCT652 DIP SOP TUBE T & R M74HCT652B1R M74HCT652M1R M74HCT652RM13TR M74HCT652TTR TSSOP 1/15 ...

Page 2

M74HCT652 INPUT AND OUTPUT EQUIVALENT CIRCUIT TRUTH TABLE GAB GBA CAB CBA SAB SBA ...

Page 3

GAB GBA CAB CBA SAB SBA Don’t Care Z : High Impedance Qn : The data stored to the internal flip-flops by most recent low to high transition of the clock inputs ...

Page 4

M74HCT652 ABSOLUTE MAXIMUM RATINGS Symbol V Supply Voltage Input Voltage Output Voltage Input Diode Current Output Diode Current Output Current ...

Page 5

DC SPECIFICATIONS Symbol Parameter V V High Level Input IH Voltage V Low Level Input IL Voltage V High Level Output OH Voltage V Low Level Output OL Voltage I Input Leakage I Current I High Impedance OZ Output Leakage ...

Page 6

M74HCT652 AC ELECTRICAL CHARACTERISTICS (C Symbol Parameter Output Transition TLH THL Time t t Propagation Delay PLH PHL Time (BUS - BUS Propagation Delay PLH PHL Time (CLOCK - BUS Propagation Delay PLH ...

Page 7

TEST CIRCUIT PLH PHL PZL PLZ PZH PHZ C = 50pF/150pF or equivalent (includes jig and probe capacitance equivalent pulse generator ...

Page 8

M74HCT652 WAVEFORM 2 : MINIMUM PULSE WIDTH, PROPAGATION DELAY (f=1MHz; 50% duty cycle) WAVEFORM 3 : MINIMUM SETUP AND HOLD TIME ((f=1MHz; 50% duty cycle) 8/15 ...

Page 9

WAVEFORM 4 : OUTPUT ENABLE AND DISABLE TIME (f=1MHz; 50% duty cycle) WAVEFORM 5 : OUTPUT ENABLE AND DISABLE TIME(f=1MHz; 50% duty cycle) M74HCT652 9/15 ...

Page 10

M74HCT652 DIM. MIN 0. 0.41 B1 1.40 c 0.20 D 31.62 E 7. 3.18 M 0˚ 10/15 Plastic DIP-24 (0.25) MECHANICAL DATA mm. TYP MAX. 4.32 3.3 0.46 ...

Page 11

SO-24 MECHANICAL DATA mm. DIM. MIN 0 0. 15.20 E 10. 13.97 F 7. TYP MAX. MIN. 2.65 0.2 0.004 ...

Page 12

M74HCT652 DIM. MIN 0. 0.19 c 0.09 D 7.7 E 6. 0˚ PIN 1 IDENTIFICATION 1 12/15 TSSOP24 MECHANICAL DATA mm. TYP MAX. 1.1 0.15 0.9 ...

Page 13

Tape & Reel SO-24 MECHANICAL DATA mm. DIM. MIN 12 10.8 Bo 15.7 Ko 2.9 Po 3.9 P 11.9 TYP MAX. MIN. 330 13.2 0.504 0.795 2.362 30.4 11.0 0.425 15.9 0.618 ...

Page 14

M74HCT652 Tape & Reel TSSOP24 MECHANICAL DATA DIM. MIN 12 6.8 Bo 8.2 Ko 1.7 Po 3.9 P 11.9 14/15 mm. TYP MAX. MIN. 330 13.2 0.504 0.795 2.362 22.4 7 0.268 ...

Page 15

... No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied ...

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