MT18LD272A Micron Technology, MT18LD272A Datasheet - Page 13
![no-image](/images/no-image-200.jpg)
MT18LD272A
Manufacturer Part Number
MT18LD272A
Description
(MT18LD272A / MT18LD472A) NONBUFFERED DRAM DIMMs
Manufacturer
Micron Technology
Datasheet
1.MT18LD272A.pdf
(30 pages)
OBSOLETE
2, 4 Meg x 72 Nonbuffered DRAM DIMMs
DM60.p65 – Rev. 6/98
EDO PAGE MODE
AC ELECTRICAL CHARACTERISTICS
(Notes: 5, 6, 7, 8, 9, 12, 29) (V
AC CHARACTERISTICS - EDO PAGE MODE OPTION
PARAMETER
RAS# to CAS# precharge time
READ command hold time (referenced to RAS#)
RAS# hold time
READ WRITE cycle time
RAS# to WE# delay time
WRITE command to RAS# lead time
Transition time (rise or fall)
WRITE command hold time
WRITE command hold time (referenced to RAS#)
WE# command setup time
Output disable delay from WE# (CAS# HIGH)
WRITE command pulse width
WE# pulse to disable at CAS# HIGH
WE# hold time (CBR Refresh)
WE# setup time (CBR Refresh)
DD
= +3.3V 0.3V)
SYMBOL
t
t
t
t
t
t
t
t
t
t
t
t
t
RWC
RWD
WCH
WCR
WCS
WRH
WRP
RRH
RWL
WHZ
WPZ
RPC
RSH
t
WP
t
T
13
MIN
116
13
67
13
38
10
5
0
2
8
0
0
5
8
8
-5
NONBUFFERED DRAM DIMMs
MAX
Micron Technology, Inc., reserves the right to change products or specifications without notice.
50
12
MIN
140
15
79
15
10
45
10
10
10
5
0
2
0
0
5
-6
MAX
50
15
2, 4 MEG x 72
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
1998, Micron Technology, Inc.
NOTES
18
23
23