MT28F200B5 Micron Technology, MT28F200B5 Datasheet - Page 8

• Manufacturer Part Number: MT28F200B5
• Description: (MT28F002B5 / MT28F200B5) FLASH MEMORY
• Manufacturer: Micron Technology

DataSheet4U.com
www.DataSheet4U.com
DataSheet
COMMAND EXECUTION LOGIC (CEL)
device. These commands control the operation of the
ISM and the read path (i.e., memory array, ID register or
status register). Commands may be issued to the CEL
while the ISM is active. However, there are restrictions
on what commands are allowed in this condition. See
the Command Execution section for more detail.
DEEP POWER-DOWN MODE
MT28F002B5 and MT28F200B5 feature a very low cur-
rent, deep power-down mode. To enter this mode, the
RP# pin is taken to V
draw is a maximum of 20 A at 5V V
power-down also clears the status register and sets the
ISM to the read array mode.
MEMORY ARCHITECTURE
architecture is designed to allow sections to be erased
without disturbing the rest of the array. The array is
divided into five addressable blocks that vary in size
2Mb Smart 5 Boot Block Flash Memory
F50.p65 – Rev. 1/00
4
U
The CEL receives and interprets commands to the
To allow for maximum power conservation, the
The MT28F002B5 and MT28F200B5 memory array
.com
WORD ADDRESS
MT28F002B5/200B5xx-xxB
10000H
04000H
03000H
02000H
00000H
1FFFFH
0FFFFH
03FFFH
02FFFH
01FFFH
Bottom Boot
BYTE ADDRESS
SS
20000H
08000H
06000H
04000H
00000H
3FFFFH
07FFFH
05FFFH
03FFFH
1FFFFH
0.2V. In this mode, the current
8KB Parameter Block
8KB Parameter Block
128KB Main Block
96KB Main Block
16KB Boot Block
CC
. Entering deep
Memory Address Maps
DataSheet4U.com
SMART 5 BOOT BLOCK FLASH MEMORY
Figure 1
8
and are independently erasable. When blocks rather
than the entire array are erased, total device endurance
is enhanced, as is system flexibility. Only the ERASE
function is block-oriented. All READ and WRITE opera-
tions are done on a random-access basis.
ERASE or WRITE with a hardware protection circuit
which requires that a super-voltage be applied to RP# or
that the WP# pin be driven HIGH before erasure is
commenced. The boot block is intended for the core
firmware required for basic system functionality. The
remaining four blocks do not require that either of
these two conditions be met before WRITE or ERASE
operations.
BOOT BLOCK
security for the most sensitive portions of the firmware.
This 16KB block may only be erased or written when the
RP# pin is at the specified boot block unlock voltage
(V
WRITE or ERASE of the boot block, the RP# pin must be
HH
The boot block is protected from unintentional
The hardware-protected boot block provides extra
) of 12V or when the WP# pin is V
Micron Technology, Inc., reserves the right to change products or specifications without notice.
WORD ADDRESS
MT28F002B5/200B5xx-xxT
1D000H
1C000H
1E000H
1DFFFH
10000H
00000H
1CFFFH
1BFFFH
1FFFFH
0FFFFH
BYTE ADDRESS
Top Boot
3A000H
3C000H
38000H
20000H
00000H
3BFFFH
3FFFFH
39FFFH
37FFFH
1FFFFH
8KB Parameter Block
8KB Parameter Block
128KB Main Block
96KB Main Block
16KB Boot Block
©2000, Micron Technology, Inc.
IH
. During a
2Mb
DataShee