MT90871 Zarlink Semiconductor, MT90871 Datasheet - Page 40

• Manufacturer Part Number: MT90871
• Description: Flexible 8K Digital Switch (F8KDX)
• Manufacturer: Zarlink Semiconductor

The LIDR0 to LIDR15 registers are configured as follows:
13.5.1
These five bits define the delay from the bit boundary that the receiver uses to sample each input. Input bit delay
adjustment can range up to 7
This can be described as: LIDn(4:0) = (no. of bits delay) / 4.
For example, if LIDn(4:0) is set to 10011 (19), the input bit delay = 19 *
Table 19 "Local Input Bit Delay Programming Table" illustrates the bit delay selection.
40
(where n = 0 to 15)
LIDRn Bit
15-5
4-0
Local Input Delay Bits 4-0 (LID4 - LID0)
Data Rate
0 (Default)
Reserved
LIDn(4:0)
1 1/4
1 1/2
1 3/4
2 1/4
2 1/2
2 3/4
3 1/4
3 1/2
3 3/4
4 1/4
Name
1/4
1/2
3/4
1
2
3
4
Table 18- Local Channel Delay Register (LIDRn) Bits
Table 19- Local Input Bit Delay Programming Table
3
/
4
Reset
bit periods forward, with resolution of
0
0
LID4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
Reserved
Local Input Bit Delay Register
The binary value of these bits refers to the input bit delay value for the
Local input stream
Zarlink Semiconductor Inc.
LID3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
Corresponding Delay Bits
LID2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
Description
/
1
4
/
4
bit period.
= 4
3
/
4.
LID1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
LID0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Data Sheet