BR24L16 Rohm, BR24L16 Datasheet - Page 6

• Manufacturer Part Number: BR24L16
• Description: 2k8 bit electrically erasable PROM
• Manufacturer: Rohm

Memory ICs
SDA data is latched into the chip at the rising edge of SCL clock.
Output data toggles at the falling edge of SCL clock.
Synchronous data timing
Write cycle timing
SCL
SDA
SCL
SDA
(OUT)
SDA
SDA
SCL
(IN)
WRITE DATA (n)
t
SU
: STA
t
HD :
t
BUF
D0
STA
BR24L16-W / BR24L16F-W / BR24L16FJ-W /
Fig.4 SYNCHRONOUS DATA TIMING
ACK
Fig.5 WRITE CYCLE TIMING
START BIT
t
HD
: STA
t
R
STOP CONDITION
t
SU
: DAT
BR24L16FV-W / BR24L16FVM-W
t
t
t
t
WR
F
LOW
PD
t
SU
: STO
START CONDITION
t
HIGH
t
DH
STOP BIT
t
HD
: DAT
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