ISL6420B Intersil Corporation, ISL6420B Datasheet - Page 15

• Manufacturer Part Number: ISL6420B
• Description: Advanced Single Synchronous Buck Pulse-Width Modulation (PWM) Controller
• Manufacturer: Intersil Corporation

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Feedback Compensation
Figure 17 highlights the voltage-mode control loop for a
synchronous-rectified buck converter. The output voltage
(Vout) is regulated to the Reference voltage level. The error
amplifier (Error Amp) output (V
oscillator (OSC) triangular wave to provide a pulse-width
modulated (PWM) wave with an amplitude of V
PHASE node. The PWM wave is smoothed by the output filter
(L
The modulator transfer function is the small-signal transfer
function of Vout/V
Gain and the output filter (L
break frequency at F
the modulator is simply the input voltage (V
peak-to-peak oscillator voltage ΔV
SS/EN
FIGURE 15. PRINTED CIRCUIT BOARD SMALL SIGNAL
FIGURE 16. PRINTED CIRCUIT BOARD POWER AND
O
C
ISL6420B
and C
SS
ISL6420B
O
UGATE
PHASE
LGATE
GND
).
GND
LAYOUT GUIDELINES
GROUND PLANES OR ISLANDS
E/A
LC
. This function is dominated by a DC
PHASE
C
VCC
BOOT
BOOT
and a zero at F
+5V
V
Q2
Q1
O
RETURN
IN
15
and C
C
E/A
VCC
D1
D2
) is compared with the
OSC
O
), with a double pole
.
ESR
C
Q1
IN
+V
Q2
IN
L
. The DC Gain of
IN
O
) divided by the
L
C
O
IN
O
C
O
at the
V
OUT
V
OUT
ISL6420B
Modulator Break Frequency Equations
The compensation network consists of the error amplifier
(internal to the ISL6420B) and the impedance networks Z
and Z
a closed loop transfer function with the highest 0dB crossing
frequency (f
is the difference between the closed loop phase at f
180°. The following equations relate the compensation
network’s poles, zeros and gain to the components (R1, R2,
R3, C1, C2, and C3) in Figure 17. Use the following
guidelines for locating the poles and zeros of the
compensation network.
F
F
FIGURE 17. VOLTAGE - MODE BUCK CONVERTER
LC
ESR
ΔV
=
OSC
FB
=
-------------------------------------- -
2π
-------------------------------------------- -
2π
. The goal of the compensation network is to provide
OSC
•
•
0dB
L
(
COMPARATOR
1
ESR C
COMPENSATION DESIGN
O
ERROR
AMP
V
ISL6420B
1
•
) and adequate phase margin. Phase margin
E/A
DETAILED COMPENSATION COMPONENTS
PWM
C
•
O
Z
+
-
V
COMP
FB
+
-
C1
OUT
O
)
REFERENCE
C2
=
+
-
R2
V
DRIVER
DRIVER
REF
REF
Z
IN
Z
×
FB
FB
⎛
⎜
⎝
1
V
IN
+
PHASE
R
R
------ -
R
4
C3
(PARASITIC)
1
4
⎞
⎟
⎠
Z
L
IN
R1
O
R3
ESR
C
V
O
OUT
April 27, 2009
0dB
V
(EQ. 4)
(EQ. 5)
FN6901.0
OUT
and
IN