ISL6420B Intersil Corporation, ISL6420B Datasheet - Page 17

• Manufacturer Part Number: ISL6420B
• Description: Advanced Single Synchronous Buck Pulse-Width Modulation (PWM) Controller
• Manufacturer: Intersil Corporation

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The ripple voltage and current are approximated by
Equations 10 and 11:
Increasing the value of inductance reduces the ripple current
and voltage. However, larger inductance values reduce the
converter’s response time to a load transient.
One of the parameters limiting the converter’s response to a
load transient is the time required to change the inductor
current. Given a sufficiently fast control loop design, the
ISL6420B will provide either 0% or 100% duty cycle in
response to a load transient. The response time is the time
required to slew the inductor current from an initial current
value to the transient current level. During this interval the
difference between the inductor current and the transient
current level must be supplied by the output capacitor.
Minimizing the response time can minimize the output
capacitance required.
The response time to a transient is different for the
application of load and the removal of load. Equations 12
and 13 give the approximate response time interval for
application and removal of a transient load:
where: I
response time to the application of load, and t
response time to the removal of load. With a +5V input
source, the worst case response time can be either at the
application or removal of load and dependent upon the
output voltage setting. Be sure to check both of these
equations at the minimum and maximum output levels for
the worst case response time.
Input Capacitor Selection
Use a mix of input bypass capacitors to control the voltage
overshoot across the MOSFETs. Use small ceramic
capacitors for high frequency decoupling and bulk capacitors
to supply the current needed each time Q1 turns on. Place the
small ceramic capacitors physically close to the MOSFETs
and between the drain of Q1 and the source of Q2.
The important parameters for the bulk input capacitor are the
voltage rating and the RMS current rating. For reliable
operation, select the bulk capacitor with voltage and current
ratings above the maximum input voltage and largest RMS
current required by the circuit. The capacitor voltage rating
should be at least 1.25x greater than the maximum input
voltage and a voltage rating of 1.5x is a conservative
Δ
Δ
t
t
RISE
FALL
I
V
L
OUT
=
V
------------------------------- -
=
=
IN
TRAN
=
Fs x L
------------------------------- -
V
L
------------------------------ -
L
- V
O
Δ
O
IN
I
V
×
×
L
OUT
–
OUT
⋅
I
I
V
TRAN
TRAN
is the transient load current step, t
ESR
OUT
⋅
V
--------------- -
V
OUT
IN
17
FALL
RISE
is the
(EQ. 12)
(EQ. 13)
(EQ. 10)
(EQ. 11)
is the
ISL6420B
guideline. The RMS current rating requirement for the input
capacitor of a buck regulator is approximately 1/2 the DC
load current. Equation 14 shows a more specific formula for
determining the input ripple:
For a through hole design, several electrolytic capacitors
(Panasonic HFQ series or Nichicon PL series or Sanyo
MV-GX or equivalent) may be needed. For surface mount
designs, solid tantalum capacitors can be used, but caution
must be exercised with regard to the capacitor surge current
rating. These capacitors must be capable of handling the
surge-current at power-up. The TPS series available from
AVX, and the 593D series from Sprague are both surge
current tested.
MOSFET Selection/Considerations
The ISL6420B requires 2 N-Channel power MOSFETs.
These should be selected based upon r
requirements, and thermal management requirements.
In high-current applications, the MOSFET power dissipation,
package selection and heatsink are the dominant design
factors. The power dissipation includes two loss
components; conduction loss and switching loss. The
conduction losses are the largest component of power
dissipation for both the upper and the lower MOSFETs.
These losses are distributed between the two MOSFETs
according to duty factor (see Equations 15 and 16). Only the
upper MOSFET has switching losses, since the Schottky
rectifier clamps the switching node before the synchronous
rectifier turns on.
Where D is the duty cycle = Vo/Vin, t
interval, and f
These equations assume linear voltage-current transitions
and do not adequately model power loss due the reverse
recovery of the lower MOSFET’s body diode. The gate-charge
losses are dissipated by the ISL6420B and don't heat the
MOSFETs. However, large gate-charge increases the
switching interval, t
switching losses. Ensure that both MOSFETs are within their
maximum junction temperature at high ambient temperature
by calculating the temperature rise according to package
thermal-resistance specifications. A separate heatsink may be
necessary depending upon MOSFET power, package type,
ambient temperature and air flow.
I
P
P
RMS
UFET
LFET
=
=
=
I
MAX
I
I
2
O
2
O
⋅
⋅
r
r
SW
⋅
DS ON
DS ON
(
(
D D
(
is the switching frequency.
SW
–
)
)
⋅
⋅
2
(
which increases the upper MOSFET
D
)
1 D
+
–
1
-- - I
2
)
O
⋅
V
IN
⋅
t
sw
SW
⋅
DS(ON)
f
is the switching
sw
, gate supply
April 27, 2009
(EQ. 14)
(EQ. 15)
(EQ. 16)
FN6901.0