PUMA2E4001-12E Mosaic Semiconductor, PUMA2E4001-12E Datasheet - Page 6
PUMA2E4001-12E
Manufacturer Part Number
PUMA2E4001-12E
Description
128K x 32 EEPROM Module
Manufacturer
Mosaic Semiconductor
Datasheet
1.PUMA2E4001-12E.pdf
(15 pages)
ISSUE 4.2 : November 1998
Note: A8 through A16 must specify the page address during each high to low transition of Write Enable (or Chip select).
Page Mode Write Waveform
Read Cycle Timing Waveform
Output Enable must be high only when Write Enable and Chip Select are both low.
A0-A16
CS1~4
Data
OE
WE
t
AS
A0~A16
CS1~4
Data
OE
Valid
Add
t
AH
Valid
Data
Byte 0
t
t
WP
DS
Byte 1
HIGH Z
t
DH
Address Valid
Byte 2
t
t
t
ACC
CLZ
RC
t
t
WPH
OLZ
t
CS
t
OE
6
Byte 3
Output
Valid
t
Byte 126
OH
t
t
OHZ
OHZ
t
BLC
Byte 127
PUMA 2/67/77E4001/A - 12/15/20
t
WC